This paper proposes a novel heterodyne multiband multiple-input multiple-output (MIMO) receiver with baseband automatic gain control (AGC) for cognitive radios. The proposed receiver uses heterodyne reception implemented with a wide-passband band-pass filter in the radio frequency (RF) stage to be able to receive signals in arbitrary frequency bands. Even when an RF Hilbert transformer is utilized in the receiver, image-band interference occurs due to the imperfection of the Hilbert transformer. In the receiver, analog baseband AGC is introduced to prevent the baseband signals exceeding the voltage reference of analog-to-digital converters (ADCs). This paper proposes a novel technique to estimate the imperfection of the Hilbert transformer in the heterodyne multiband MIMO receiver with baseband AGC. The proposed technique estimates not only the imperfection of the Hilbert transformer but also the AGC gain ratio, and analog devices imperfection in the feedback loop, which enables to offset the imperfection of the Hilbert transformer. The performance of the proposed receiver is verified by using computer simulations. As a result, the required resolution of the ADC is 9 bits in the proposed receiver. Moreover, the proposed receiver has less computational complexity than that with the baseband interference cancellation unless a frequency band is changed every 9 packets or less.

This paper proposes a reduced-complexity multiband multiple-input multiple-output (MIMO) receiver that can be used in cognitive radios. The proposed receiver uses heterodyne reception implemented with a wide-passband band-pass filter in the radio frequency (RF) stage. When an RF Hilbert transformer is utilized in the receiver, image-band interference occurs because of the transformer's imperfections. Thus, the imperfection of the Hilbert transformer is corrected in the intermediate frequency (IF) stage to reduce the hardware complexity. First, the proposed receiver estimates the channel impulse response in the presence of the strong image-band interference signals. Next, the coefficients are calculated for the correction of the imperfection at the IF stage, and are fed back to the IF stage through a feedback loop. However, the imperfection caused by the digital-to-analog (D/A) converter and the baseband amplifier in the feedback loop corrupts the coefficients on the way back to the IF stage. Therefore, the proposed receiver corrects the imperfection of the analog devices in the feedback loop. The performance of the proposed receiver is verified by using computer simulations. The proposed receiver can maintain its performance even in the presence of strong image-band interference signals and imperfection of the analog devices in the feedback loop. In addition, this paper also reveals the condition for rapid convergence.

Application area of mixed signal technology is currently expanded to digital communication, networking, and digital storage systems from conventional digital audio and video systems. Digital consumer electronics are emerged and their markets are extremely increased. Rapid progress of integrated circuit technology has enabled a system level integration on a SoC. Thus mixed signal SoC becomes a majority in LSI industry. Almost all the analog functions should be realized by CMOS technology on SoC, yet some difficulties such as a low transconductance, a large mismatch voltage, and a large 1/f noise should be solved. CMOS device has been considered as a poor device for the analog use, however in reality, it has attained a remarkable progress for analog applications. CMOS device has a variety of circuit techniques to address its own issues and also has an analog performance that increases rapidly with technology scaling. The mixed signal SoC needs a new development strategy and design methodology that covers from system level to device level for addressing tough needs for a shorter development time, a lower cost, and a higher design quality. The optimizations over analog and digital and over system to device must be established for the development success. Difficulty of low voltage operation of further scaled CMOS in analog circuits will be the most serious issue. This results in the saturation of performance and increase of cost. The system level optimization over analog and digital, digital calibration and compensation, and the use of sigma-delta modulation method will give us the solution.