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  • Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic

    Naotake KAMIURA  Yutaka HATA  Kazuharu YAMATO  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E79-D No:10
      Page(s):
    1453-1461

    In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the viewpoints of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.