IEICE TRANSACTIONS on Information
Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic
Summary :
In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the viewpoints of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.
- Publication
- IEICE TRANSACTIONS on Information Vol.E79-D No.10 pp.1453-1461
- Publication Date
- 1996/10/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Fault Tolerant Computing
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Naotake KAMIURA, Yutaka HATA, Kazuharu YAMATO, "Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic" in IEICE TRANSACTIONS on Information,
vol. E79-D, no. 10, pp. 1453-1461, October 1996, doi: .
Abstract: In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the viewpoints of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.
URL: https://global.ieice.org/en_transactions/information/10.1587/e79-d_10_1453/_p
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@ARTICLE{e79-d_10_1453,
author={Naotake KAMIURA, Yutaka HATA, Kazuharu YAMATO, },
journal={IEICE TRANSACTIONS on Information},
title={Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic},
year={1996},
volume={E79-D},
number={10},
pages={1453-1461},
abstract={In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the viewpoints of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic
T2 - IEICE TRANSACTIONS on Information
SP - 1453
EP - 1461
AU - Naotake KAMIURA
AU - Yutaka HATA
AU - Kazuharu YAMATO
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E79-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 1996
AB - In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the viewpoints of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.
ER -
English
