This paper investigates a two-class priority queue with decrementing service of a parameter (k1=, k2=k,1k) which operates as follows: Starting once a class-1 message service, a single server serves all messages in queue 1 until it becomes empty. After service completion in queue 1, the server switches over to queue 2 and continues serving messages in queue 2 until either queue 2 becomes empty, or the number of messages decreases to k less than that found upon the server's arrival at queue 2, whichever occurs first. It is assumed that arrival streams are Poissonian, message service times are generally distributed, and switch-over times are zero. We derive queue-length generating functions and LSTs of message waiting time distributions.

This paper is a study on the behavioral aspects of the input buffer limiting scheme whose basic feature is to award priority to the transit messages over the input messages so that congestion does not develop in the network. The numerical method employed in the analysis is that proposed in Ref.(7). The performance aspects are studied for different buffer capacities, different message handling capacities and different levels of reservation for transit traffic. The numerical method indicates that thrashing occurs at low levels of reservation for the transit messages, irrespective of the buffer size or the processor capacities of the node. This observation is supported by simulation results. With reference to the state-space of the model of our study, the congestion aspects are related to two Liapunov functions. Under the domain of one of the Liapunov functions, the evolution of the perturbed system is towards a congested state whereas, under the domain of the other Liapunov function, the evolution is towards a congestion-free state. Regardless of the configuration, it is found that the fundamental characteristic of the congestion under the input buffer limiting scheme is the characteristic of a fold catastrophe. In the systems with insufficient level of reservation for the transit traffic, the performance degradation appears to be inevitable, irrespective of the capacities of the nodal processor and output channel processor, and the size of the buffer pool. Given such an inevitability, the active life of a node under a typical node configuration is studied by simulation. A suitable performance index is suggested to assess the performance of deadlock-prone nodes.

The effects of changing system parameters on job scheduling policies are studied for load balancing of multi-class jobs in a distributed computer system that consists of heterogeneous host computers connected by a single-channel communications network. A job scheduling policy decides which host should process the arriving jobs. We consider two job scheduling policies. The one is the overall optimal policy whereby jobs are scheduled so as to minimize the overall mean job response time. Tantawi and Towsley obtained the algorithm that gives the solution of the policy in the single class job environment and Kim and Kameda extended it to the multiple job class environment. The other is the individually optimal policy whereby jobs are scheduled so that every job may feel that its own expected response time is minimized. We can consider three important system parameters in a distributed computer system: the communication time of the network, the processing capacity of each node, and the job arrival rate of each node. We examine the effects of these three parameters on the two load balancing policies by numerical experiment.

A fast scan-line algorithm for a raster-scan graphics display is proposed based on an observation that a sequence of successive image frames in animation mostly consists of still objects with relatively few moving objects. In the proposed algorithm, successive images are generated using the background image composed of still objects only, and moving image composed only of moving objects. The color of each pixel in the successive images is then determined by one, which is nearer from eye, between the two candidate pixels, where one is from the background image and the other is from the moving image. The background image is generated once in the whole process, while the moving image is generated for each time frame using an interpolation of two images generated at the start and end time of the given time interval. For the purpose of fast shadow generation, we classify the shadows into three groups, i.e., still shadows generated by still objects on still objects, moving shadows generated by moving objects on still objects, and composite shadows generated by both still objects and moving objects on moving objects. These shadows can be generated very quickly by utilizing the frame coherence. According to the experimental results, a speed up factor of 3.2 to 12.8, depending on the percentage of the moving objects among all objects, was obtained using our algorithm, compared to the conventional scheme not utilizing the frame-to-frame image coherence.

A random pulse stream (RPS) generator was developed for the noise immunity test of various digital system including communication system. By using this RPS generator along with the composite noise generator (CNG) developed formerly, the Middleton's "Class A" noise could be generated, and the total system (RPS+CNG) became more general noise simulator. In this paper, the configuration of CNG with newly developed RPS generator, and a typical example of Class A noise generated by this system are shown.

Based on the semiclassical theory, we deduce the expressions of stimulated absorption, stimulated amplification and threshold by using density matrix equation in the Er3+-doped fibers. Meaningful results have been given and some phenomena occuring in experiments are explained theoretically.

We study the computational power of PC=P. We give a characterization of the class via single Turing machines. Based on the characterization, we give combinatorial problems that are Pm-complete for the class.

We study the depth of planar Boolean circuits. We show that planar Boolean circuits of depth D(n) are simulated by on-line Turing machines in space O(D(n)). From this relationship, it is shown that any planar circuit for computing integer multiplication requires linear depth. It is also shown that a planar analogue to the NC-hierarchy is properly separated.