We have fabricated multiple-stacked Si quantum dots (QDs) with and without Ge core embedded in a SiO2 network on n-Si(100) and studied their field electron emission characteristics under DC bias application. For the case of pure Si-QD stacks with different dot-stack numbers, the average electric field in dot-stacked structures at which electron emission current appeared reached minimum value at a stack number of 11. This can be attributed to optimization of the electron emission due to enhanced electric field concentration in the upper layers of the dot-stacked structures and reduction of the electron injection current from the n-Si substrate, with an increased stack number. We also found that, by introducing Ge core into Si-QDs, the average electric field for the electron emission can be reduced below that from pure Si-QDs-stacked structures. This result implies that the electric field is more concentrated in the upper Si-QDs with Ge core layers due to deep potential well for holes in the Ge core.

We propose a new cone-type DRAM cell as a 1T DRAM cell. The superiority of cone shape is already reported, in that the electric field concentration effect encourages impact ionization phenomenon. So the device has improved DRAM characteristics compared with cylinder type 1T DRAM Cell (SGVC Cell). To confirm the memory operation of the cone-type DRAM cell, simulation works were carried out. Also, retention characteristic shows the device can be used practically.