1-2hit |
Masakazu MIZOKAMI Kawori TAKAKUBO Hajime TAKAKUBO
A four-quadrant-input linear transconductor generating a product or a product sum current is proposed. The proposed circuit eliminates the influence of channel length modulation and expands a dynamic input voltage range. As an application of the proposed circuit, the four-quadrant analog multiplier is designed. The four-quadrant analog multiplier consists of the proposed circuit, an input circuit and a class AB current buffer. HSPICE simulation results with 0.35 µm n-well single CMOS process parameter are shown in order to evaluate the proposed circuit.
A bipolar low-voltage multiplier core is presented. The proposed low-voltage multiplier core is built from a bipolar quadritail cell. Voltages applied to the individual bases of the transistors in the bipolar quadritail cell are aVxbVy, (a1)Vx(b1)Vy ,aVx(b1)Vy, and (a1)VxbVy, where Vx and Vy are the input signals, and a and b are constants, for example, VxVy, O, Vx, and Vy. Simple input systems using resistive dividers are also described. The dc transfer characteristics were verified on a breadboard using transistor-arrays and discrete components. The dc transfer characteristic of the proposed multiplier core is very close to that of the Gilbert multiplier cell, but the proposed multiplier core is operable on low supply voltage. Therefore, a bipolar multiplier core using a quadritail cell is a low-voltage version of the Gilbert multiplier cell. The proposed bipolar multiplier is practically useful because it can be easily implemented in integrated circuits by utilizing a multiplier core and a resistor-only input system, and it also operates at very lowvoltage. Therefore, the proposed bipolar multipliers are very suitable for low-power operation.