Leakage current for MOSFET in off-state is one of the serious problems in charge-based analog circuits under low power supply. To suppress the leakage current, a method that a slight voltage is applied to source to accomplish reverse bias between source and bulk is proposed. The proposed bias condition, also other bias conditions, is analyzed by injection carrier density in p-n junction and surface carrier concentration in MOS diode in four-terminal MOSFET. Leakage current is modeled by combining the characteristics of p-n junction with MOS diode in MOSFET. The characteristics of MOSFET fabricated with a standard 0.18 µm n-well CMOS technology are measured to investigate the basic principle. Measured leakage current fits to the theoretical leakage current exactly. The proposed slight bias to source terminal in MOSFET is proved most efficient to reduce the leakage current. Based on the proposed source bias condition, MOSFET switches with low leakage current under a single power supply are proposed.

Analog inverter is one of the most useful building blocks in analog circuits. This paper proposes an analog inverter consisting of a p-channel MOS (PMOS) and an n-channel MOS (NMOS) inverter and presents an application to all-pass filter realizations. The proposed circuit has a wide dynamic range by combining PMOS and NMOS inverters. When the proposed analog inverter is applied to an all-pass filter, the circuit configuration becomes simpler and occupies less chip area and power consumption.

A wide range CMOS voltage detector with low current consumption consisting of CMOS inverters operating in both weak inversion and saturation region is proposed. A terminal of power supply for CMOS inverter can be expanded to a signal input terminal. A voltage-detection point and hysteresis characteristics of the proposed circuit can be designed by geometrical factor in MOSFET and an external bias voltage. The core circuit elements are fabricated in standard 0.18 µm CMOS process and measured to confirm the operation. The detectable voltage is from 0.3 V to 1.8 V. The current consumption of voltage detection, standby current, is changed from 65 pA for Vin = 0.3 V to 5.5 µA for Vin = 1.8 V. The thermal characteristics from 250 K to 400 K are also considered. The measured temperature coefficient of the proposed voltage-detector core operating in weak inversion region is 4 ppm/K and that in saturation region is 10 ppm/K. The proposed voltage detector can be implemented with tiny chip area and is expected to an on-chip voltage detector of power supply for mobile application systems.

Voltage follower is one of the most useful building blocks in analog circuits. This paper proposes a voltage follower composed of a complementary pair of p-channel MOS(PMOS) and n-channel MOS (NMOS) differential amplifiers which operates under low power supply. The proposed circuit has a rail-to-rail dynamic range by combining complementary differential amplifiers.

A mapping circuit in order to have a wider input dynamic range is proposed. MOSFET's connecting between power supply lines are employed to construct the mapping circuit. SPICE simulation is shown to evaluate the proposed circuits. With the proposed mapping circuit, two-MOSFET subtractor has a rail-to-rail input voltage. As an application, an OTA consisting of subtractors is realized by employing the proposed mapping circuits to have a rail-to-rail input voltage range.

A CMOS voltage reference circuit based on a voltage at the zero-temperature-coefficient point of drain current is proposed. The output voltage of the proposed circuit is variable by a substrate bias. The proposed circuit is simulated with a standard 0.8-µm CMOS technology. The output voltage keeps 800 mV, and its fractional temperature coefficient is 9.94 ppm/ over the temperature range from -100 to 150 at a zero-bias. The PSRR of the output voltage is -42.55 dB at 100 Hz. The minimum power-supply voltage is 2.1 V. The output voltage can be shifted down to 670 mV while maintaining its temperature-insensitivity.

A linear voltage-to-current convertor without current mirror circuit is proposed for low distortion applications employing short channel MOSFET's. Twin current sources and current sinks pair of MOSFET's having the same drain-source voltage are employed for a substitute of the current mirror circuits, in order to eliminate the channel length modulation factor of the short channel MOSFET's. HSPICE simulation is shown in order to evaluate the proposed circuits. As an application, a low distortion OTA is realized by employing the proposed linear voltage-to-current convertor with short channel MOSFET's.

A four-quadrant-input linear transconductor generating a product or a product sum current is proposed. The proposed circuit eliminates the influence of channel length modulation and expands a dynamic input voltage range. As an application of the proposed circuit, the four-quadrant analog multiplier is designed. The four-quadrant analog multiplier consists of the proposed circuit, an input circuit and a class AB current buffer. HSPICE simulation results with 0.35 µm n-well single CMOS process parameter are shown in order to evaluate the proposed circuit.

Temperature dependence of drain current is analyzed in detail in terms of mobility and threshold voltage. From the analyses, it is proved that a point exists that the drain current is fixed without depending on temperature when the MOSFET operates in strong inversion. Applying this characteristic, a CMOS temperature-voltage converter operating in strong inversion with high linearity is proposed. SPICE simulation and experimental results are shown, and the corresponding performances are discussed.

An OTA without a tail-current source is proposed for low power supply voltages. Only two MOSFET's are connected between power supply lines in order to operate under low power supply voltages. A few MOSFET's are added at the expense of eliminating the tail-current source of the conventional OTA. SPICE simulation is shown in order to evaluate the proposed circuits. As an application, a low-pass filter is realized by employing the proposed OTA's.