Kawori TAKAKUBO Shigetaka TAKAGI Hajime TAKAKUBO Nobuo FUJII
An OTA without a tail-current source is proposed for low power supply voltages. Only two MOSFET's are connected between power supply lines in order to operate under low power supply voltages. A few MOSFET's are added at the expense of eliminating the tail-current source of the conventional OTA. SPICE simulation is shown in order to evaluate the proposed circuits. As an application, a low-pass filter is realized by employing the proposed OTA's.
Retdian A. NICODIMUS Shigetaka TAKAGI Kazuyuki WADA
An active shield circuit which effectively reduces the substrate noise on the entire area inside the guard ring regardless of the noise source position is proposed. Simulation result shows that the proposed circuit can reduce the noise level to -85 dB while a conventional guard ring gives -52 dB.
Kazuyuki WADA Shigetaka TAKAGI Zdzislaw CZARNUL Nobuo FUJII
This paper proposes a topology-independent predistortion for filters using integrators. This employs integrators having the same structure, the same-value elements and an electrically controllable unity-gain frequency and compensates for the deviation of frequency characteristics due to excess phase shifts of integrators without knowledge of a filter topology. The effectiveness of the proposed method is demonstrated through SPICE simulations.
Moonjae JEONG Shigetaka TAKAGI Zdzislaw CZARNUL Nobuo FUJII
A novel voltage-tunable linear 3-input CMOS Operational Transconductance Amplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced s a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.
Kawori TAKAKUBO Hajime TAKAKUBO Shigetaka TAKAGI Nobuo FUJII
Analog inverter is one of the most useful building blocks in analog circuits. This paper proposes an analog inverter consisting of a p-channel MOS (PMOS) and an n-channel MOS (NMOS) inverter and presents an application to all-pass filter realizations. The proposed circuit has a wide dynamic range by combining PMOS and NMOS inverters. When the proposed analog inverter is applied to an all-pass filter, the circuit configuration becomes simpler and occupies less chip area and power consumption.
Shigetaka TAKAGI Nobuo FUJII Takeshi YANAGISAWA
Continuous-time MOSFET-capacitor filters have quite a serious problem, that is, MOS transistors' nonlinearity drastically reduces the filters' dynamic ranges. Czarnul proposed an MOS resistive circuit with high degree of linearity and solved this problem. The method, however, requires two capacitors for each integrator. Consequently, the chip area and manufacturing cost will increase. This paper proposes a new single capacitor integrator which can cancel the nonlinearity of transistors. The integrator is applied to a canonical continuous-time filter synthesis with high linearity. A total harmonic distortion less than 0.33% is obtained by SPICE analysis.
Takahide SATO Shigetaka TAKAGI Nobuo FUJII
A novel linear voltage-to-current conversion circuit for a rail-to-rail input voltage is proposed in this paper. A pair of MOSFETs operating in plural regions are used for the conversion and a difference of their drain currents is used as an output current. The two MOSFETs work complemetarily and realize a rail-to-rail input range. The output current is linear in any input voltage from the ground potential to a power-supply voltage. Two types of circuit configurations which realize the proposed concept are given. From the viewpoint of area efficiency and linearity the proposed circuit is superior to a voltage-to-current converter previously proposed by the authors, which uses a set of three MOSFETs to achieve a rail-to-rail voltage-to-current conversion . The operation principle of the proposed method is confirmed through HSPICE simulations.
Takahide SATO Shigetaka TAKAGI Nobuo FUJII
An equivalent MOSFET circuit with a wide input range is proposed. The proposed circuit is suitable for a realization of a wide input range under a low power supply voltage. The circuit consists of a MOSFET array and level shift circuits. The sum of drain currents of the MOSFET array is used as an equivalent drain current. The equivalent drain current is represented by K(VGS-VT)2 even when its drain-to-source voltage is quite small and some MOSFETs in the array are in the non-saturation region or the cut-off region. The input range of the proposed circuit realized by k-MOSFET array is k times as wide as that of a single MOSFET. It is confirmed through HSPICE simulations that the proposed circuit is effective in applications with a wide dynamic range.
Retdian A. NICODIMUS Hiroto SUZUKI Kazuyuki WADA Shigetaka TAKAGI
A design optimization of active shield circuit using noise averaging method is proposed. The relation between the averaged noise and the design parameters of the active shield circuit such as circuit gain and on-chip layout is examined. A simple design guideline is also provided. Simulation results show that the active shield circuit designed by the proposed optimization method gives a better noise suppression performance of about 28% than the conventional one.
Retdian NICODIMUS Shigetaka TAKAGI
A design methodology for implementation of low-noise switched-capacitor low-pass filter (SC LPF) with small capacitance spread is proposed. The proposed method is focused on the reduction of operational amplifier noise transfer gain at low frequencies and the reduction of total capacitance. A new SC LPF topology is proposed in order to adapt the correlated double sampling and charge scaling technique at the same time. Design examples show that proposed filter reduces the total capacitance by 65% or more compared to the conventional one without having significant increase in noise transfer gain.
Shigetaka TAKAGI Retdian AGUNG NICODIMUS Kazuyuki WADA Takahide SATO Nobuo FUJII
A multi-path structure is proposed for reduction in effect of digital substrate noise which degrades analog circuit performance. As an example low-pass filters are implemented in a 0.18-µm CMOS process. 11-dBm reduction in digital substrate noise is achieved as compared with a conventional structure.
Shigetaka TAKAGI Zdzislaw CZARNUL Nobuo FUJII
This paper proposes a novel method to realize highly linear MOS circuits using MOSFETs in the nonsaturation region. The proposed method is based on the cancellation of nonlinearity of two MOSFETs by using a current inversiontype negative impedance converter. First, grounded and floating resistor realizations are discussed. Next, by exploiting the MOS resistor circuits, gyrators and inductors are realized. As an application example, a third-order doubly-terminated LC filter is simulated. SPICE analysis shows low total harmonic distortions, excellent controllability and small gain error in the passband.
Jorge KOYAMA Shigetaka TAKAGI Takeshi YANAGISAWA
Continuous-time high-frequency active filters suitable for monolithic implementation by standard low cost bipolar process are presented. Balanced NIC's are used to cancel out the loss of passive RC integrators, thus realizing active loss-less integrators with good high-frequency performance. Two types of balanced integrators are proposed and their quality factors are analyzed. The proposed NIC-integrators are used to realize tunable active filters capable of low-voltage operation and without the drawbacks of the NIC-gyrator filters. As an example of application of the NIC-integrators to leapfrog simulation of RLC ladders a second-order 1 MHz bandpass filter was designed, computer simulated and laboratory tested showing good results.
Moonjae JEONG Satoshi TANAKA Shigetaka TAKAGI Nobuo FUJII Hiroshi KAWAMOTO
This paper presents a 7th-order channel-select filter for a spread-spectrum wireless receiver operating with a minimum power supply of 2.5 V. The channel-select filter implements a sharp transition from 2 MHz to 4 MHz and a stopband attenuation of 50 dB. The 7th-order filter is realized by a cascade of a passive RC integrator, a 3rd-order leapfrog filter, an operational amplifier based differentiator, a 2nd-order notch filter, and a 1st-order allpass filter. It is designed in a 0.35 µm single-poly BiCMOS process. Simulation results show feasibility of the proposed filter.
Takahide SATO Shigetaka TAKAGI Nobuo FUJII
A high-speed transconductance-C-opamp integrator using a current-feedback amplifier is proposed. The integrator has good frequency response compared with a conventional transconductance-C-opamp integrator using a voltage-feedback amplifier. The current-feedback amplifier shifts the second pole of the proposed integrator to the upper frequency. The frequency is proportional to the current gain of the current-feedback amplifier. The proposed integrator can eliminate effects of the parasitics at the output node of the transconductance since the voltage at the node is fixed. One of the circuit examples of the proposed integrator is shown. Its validity is confirmed through HSPICE simulations. The proposed integrator works as predicted up to 260 MHz.
Moonjae JEONG Shigetaka TAKAGI Nobuo FUJII
This paper proposes a fully balanced circuit structure with a zero common-mode gain. The common-mode gain of the proposed structure becomes theoretically zero with a perfect device matching. Even if a perfect device matching is not achieved, the common-mode signal can be sufficiently suppressed by the feedback loops provided with the structure. Based on this concept, an integrator is composed. Furthermore the concept can be directly applied to a filter design. The application results in reduced chip area. A design example of a second-order filter and simulation results verify the theoretical expectation.
Retdian NICODIMUS Shigetaka TAKAGI
This paper proposes a technique to reduce the capacitance spread in switched-capacitor (SC) filters. The proposed technique is based on a simple charge distribution and partial charge transfer which is applicable to various integrator topologies. An implementation example on an existing integrator topology and a design example of a 2nd-order SC low-pass filter are given to demonstrate the performance of the proposed technique. A design example of an SC filter show that the filter designed using the proposed technique has an approximately 23% less total capacitance than the one of SC low-pass filter with conventional capacitance spread reduction technique.
This paper reviews analog-circuit researches in the 1990's especially from an academic-side point of view with the aim of pursuing what becomes important in the 21st century. To achieve this aim a large number of articles are surveyed and more than 200 are listed in References.