IEICE TRANSACTIONS on Fundamentals
Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization
Summary :
A novel voltage-tunable linear 3-input CMOS Operational Transconductance Amplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced s a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E80-A No.12 pp.2548-2554
- Publication Date
- 1997/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Category
- Analog Signal Processing
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Moonjae JEONG, Shigetaka TAKAGI, Zdzislaw CZARNUL, Nobuo FUJII, "Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization" in IEICE TRANSACTIONS on Fundamentals,
vol. E80-A, no. 12, pp. 2548-2554, December 1997, doi: .
Abstract: A novel voltage-tunable linear 3-input CMOS Operational Transconductance Amplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced s a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e80-a_12_2548/_p
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@ARTICLE{e80-a_12_2548,
author={Moonjae JEONG, Shigetaka TAKAGI, Zdzislaw CZARNUL, Nobuo FUJII, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization},
year={1997},
volume={E80-A},
number={12},
pages={2548-2554},
abstract={A novel voltage-tunable linear 3-input CMOS Operational Transconductance Amplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced s a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2548
EP - 2554
AU - Moonjae JEONG
AU - Shigetaka TAKAGI
AU - Zdzislaw CZARNUL
AU - Nobuo FUJII
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E80-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 1997
AB - A novel voltage-tunable linear 3-input CMOS Operational Transconductance Amplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced s a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.
ER -
English
