An integrator using UGB (unity-gain buffer) is proposed. The UGB has gain error. To improve the gain error of UGB in the integrator, a compensation technique of the gain error of UGB is proposed. Next, second-order ΣΔ A/D converter using UGB integrator with gain-error compensator is proposed. In the proposed circuit, the influence of input-output characteristic is simulated. In the simulation results, the improvement is confirmed. In addition, performance limiting factors due to non ideal effects, e.g., parasitic capacitance and offset voltage, are considered. Validity of the proposed compensation technique for each factor is confirmed in the simulation results.