Precision microwave measurement systems require highly stable oscillators with both excellent long-term and short-term stability. Compared to components used in laboratory instruments, dielectric resonator oscillators (DRO) offer low phase noise with greatly reduced mechanical complexity. To further enhance performance, phase-locked loop (PLL) stabilization can be used to eliminate drift and provide precise frequency control. In this work, the design of a low-cost DRO concept is presented and its performance is evaluated through simulations and measurements. An open-loop phase noise of -107.2 dBc/Hz at 10 kHz offset frequency and 12.8 GHz output frequency is demonstrated. Drift and phase noise are reduced by a PLL, so that a very low jitter of under 29.6 fs is achieved over the entire operating bandwidth.

To improve simulation precision, the signal model of navigation satellite signal simulators is illustrated, and the generation mechanism and evaluation criteria of an important error source-phase jitter in baseband signal generation, are studied subsequently. An improved baseband signal generator based on dual-ROM look-up table structure is designed with the application of a newly-established concept-virtual sampling rate. Pre-storage of typical baseband signal data and sampling rate conversion adaptive to Doppler frequency shifts are adopted to achieve the high-precision simulation of baseband signals. Performance analysis of the proposed baseband signal generator demonstrates that it can successfully suppress phase jitter and has better spectral performance, generating high-precision baseband signals, which paves the way to improving the overall precision of navigation satellite signal simulators.

This letter proposes a peak power reduction method that optimizes sub-carrier phases of an OFDM signal. The proposed method doesn't require side information transmission and original signal regeneration, which are required in conventional peak power reduction methods with phase optimization, since the optimized phases are distributed as jitter around the original phases before optimization. The iterative PTS (partial transmit sequences) algorithm with a restricted phase control range is used for the jitter injection: the phase optimization process is repeated with widening the control range. A computer simulation is carried out to estimate the proposed method performance. The results show that the proposed method can reduce the peak power by 4 dB when the power penalty caused by phase jitter is only 0.2 dB.

A novel modified midtread quantizer is proposed for number-controlled oscillator frequency quantization in digital phase-locked loops (DPLLs). We show that DPLLs employing the proposed quantizer provide significantly improved cycle slip performance compared to those employing conventional midtread or midrise quantizers, especially when the number of quantization bits is small and the magnitude of input signal frequency normalized by the quantization interval is less than 0.5.

The additive noise response of a charge pump phase-locked loop in the synchronous mode of operation has been studied. In order to determine the tracking and noise performances of the loop, mean square values of tracking error and local oscillator phase jitter have been analytically obtained. Analytical results agree well with the simulation results obtained here and elsewhere. The analysis performed can be used in choosing different system parameters for optimum system operation.

In this paper an analysis on the oversampling data recovery circuit is presented. The input waveform is assumed to be non-return-zero (NRZ) binary signals. A finite Markov chain model is used to evaluate the steady-state phase jitter performance. Theoretical analysis enables us to predict the input signal-to-noise ratio (SNR) versus bit error rate (BER) of the oversampling data recovery circuit for various oversampling ratios. The more number of samples per single bit results in the better performance on BER at the same input SNR. To achieve 10-11 BER, 8 times oversampling has about 2 dB input signal penalty compared to 16 times oversampling. In an architectural choice of the oversampling data recovery circuit, the recovered clock can be updated in each data bit or in every multiple bits depending on the input data rate and input noise. Two different clock update schemes were analyzed and compared. The scheme updating clock in every data bit has about 1.5 dB penalty against the multiple bits (4 bits) clock updating scheme with 16 times oversampling in white noise dominant input data. The results were applied to the fabricated circuits to validate the analysis.

In bandlimited QPSK and QAM transmission systems, phase jitter occurs in the output of a carrier recovery circuit that uses a fourth-power multiplier. To analyze the phase jitter, an exact expression was derived for the autocorrelation function and power spectral density for the case in which bandlimited Gaussian noise and a QPSK or QAM signal with random modulation and arbitrary waveform are simultaneously applied to the fourth-power multiplier. Using this expression, the rms phase jitter of the recovered carrier in root-cosine-rolloff transmission systems for QPSK, 16QAM, 64QAM and 256QAM was calculated. It was shown that the conventional theories for rectangular waveforms are special cases of our theory.

In this paper we analize the performance of Trellis Coded Modulation (TCM) schemes with coherent detection operating in a frequency flat, mobile Rayleigh fading environment, and with different knowledge levels on both the amplitude and phase fading processes (the latter is not assumed as usual to be ideally tracked), or Channel State Information (CSI). For example, whereas ideal CSI means that both the amplitude and phase fading characteristics are perfectly known by the receiver, other situations that are treated consider perfect knowledge of the amplitude (or phase) with complete disregard of the phase (or amplitude), as well as non concern on any of them. Since these are extreme cases, intermediate situations can be also defined to get extended bounds based on Chernoff which allow the phase errors, in either form of constant phase shifts or randomly distributed phase jitter, to be included in the upper bounds attainable by transfer function methods, and are applicable to multiphase/level signaling schemes. We found that when both fading characteristics are considered, the availability of CSI enhances significatively the performance. Furthermore, for non constant envelope schemes with non ideal CSI and for constant envelope schemes with phase errors, an asymmetry property of the pairwise error probability is identified. Theoretical and simulation results are shown in support of the analysis.