TransferJetTM is an emerging high-speed close-proximity wireless communication standard, which enables a data transfer up to 522 Mbps within a few centimeters range. We present a fully integrated TransferJet SoC with a 4.48-GHz operating frequency and a 560-MHz signal bandwidth using a 65 nm CMOS technology. Baseband filtering techniques for a transmitter (TX) and a receiver (RX) are proposed in order to handle the ultra-wide bandwidth with low power consumption and small area. A programmable power attenuator (PAT) for precise output power is also proposed in this paper. The SoC achieves energy efficiencies of 0.19 nJ/bit and 0.43 nJ/bit for the TX and the RX, respectively. The RX sensitivity of -70 dBm for 522 Mbps data rate and the TX error vector magnitude (EVM) of -31 dB are achieved.

Using a pair of matched square-root-raised-cosine (SRRC) filters in the transmitter and the receiver in a band-limited digital communication system can theoretically achieve zero inter-symbol interference (ISI). In reality, the ISI cannot be zero when both SRRC filters are approximately implemented because of some numerical precision problems in the design phase as well as in the implementation phase. In this paper, the author proposes an iterative method to design the coefficients of SRRC FIR filters. The required ISI of the system can be specified such that both ISI and frequency domain specifications are monitored in the design phase. Since the ISI can be specified beforehand, the tradeoff between performance and the filter length becomes possible in the proposed design algorithm.