The search functionality is under construction.

Keyword Search Result

[Keyword] scheduling method(2hit)

1-2hit
  • Coded Caching in Multi-Rate Wireless Networks Open Access

    Makoto TAKITA  Masanori HIROTOMO  Masakatu MORII  

     
    PAPER-Coding Theory

      Vol:
    E103-A No:12
      Page(s):
    1347-1355

    The network load is increasing due to the spread of content distribution services. Caching is recognized as a technique to reduce the peak network load by storing popular content into memories of users. Coded caching is a new caching approach based on a carefully designed content placement to create coded multicasting opportunities. Coded caching schemes in single-rate networks are evaluated by the tradeoff between the size of memory and that of delivered data. For considering the network with multiple transmission rates, it is crucial how to operate multicast. In multicast delivery, a sender must communicate to intended receivers at a rate that is available to all receivers. Multicast scheduling method of determining rates to deliver are evaluated by throughput and delay in multi-rate wireless networks. In this paper, we discuss coded caching in the multi-rate wireless networks. We newly define a measure for evaluating the coded caching scheme as coded caching delay and propose a new coded caching scheme. Also, we compare the proposed coded caching scheme with conventional coded caching schemes and show that the proposed scheme is suitable for multi-rate wireless networks.

  • Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

    Yuhei KANEKO  Nobuhiko SUGINO  Akinori NISHIHARA  

     
    PAPER

      Vol:
    E88-A No:4
      Page(s):
    846-854

    A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.