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[Keyword] serializer(3hit)

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  • A 16/32Gbps Dual-Mode SerDes Transmitter with Linearity Enhanced SST Driver

    Li DING  Jing JIN  Jianjun ZHOU  

     
    PAPER

      Pubricized:
    2022/05/13
      Vol:
    E105-A No:11
      Page(s):
    1443-1449

    This brief presents A 16/32Gb/s dual-mode transmitter including a linearity calibration loop to maintain amplitude linearity of the SST driver. Linearity detection and corresponding master-slave power supply circuits are designed to implement the proposed architecture. The proposed transmitter is manufactured in a 22nm FD-SOI process. The linearity calibration loop reduces the peak INL errors of the transmitter by 50%, and the RLM rises from 92.4% to 98.5% when the transmitter is in PAM4 mode. The chip area of the transmitter is 0.067mm2, while the proposed linearity enhanced part is 0.05×0.02mm2 and the total power consumption is 64.6mW with a 1.1V power supply. The linearity calibration loop can be detached from the circuit without consuming extra power.

  • Design of a Compact Double-Channel 5-Gb/s/ch Serializer Array for High-Speed Parallel Links

    Chang-chun ZHANG  Long MIAO  Kui-ying YIN  Yu-feng GUO  Lei-lei LIU  

     
    PAPER-Electronic Circuits

      Vol:
    E97-C No:11
      Page(s):
    1104-1111

    A fully-integrated double-channel 5-Gb/s/ch 2:1 serializer array is designed and fabricated in a standard 0.18-$mu $m CMOS technology, which can be easily expanded to any even-number-channel array, e.g. 12 channels, by means of arrangement in a parallel manner. Besides two conventional half-rate 2:1 serializers, both phase-locked loop and delay-locked loop techniques are employed locally to deal with the involved clocking-related issues, which make the serializer array self-contained, compact and automatic. The system architecture, circuit and layout designs are discussed and analyzed in detail. The chip occupies a die area of 673,$mu $m$, imes ,$667,$mu $m with a core width of only 450,$mu $m. Measurement results show that it works properly without a need for additional clock channels, reference clocks, off-chip tuning, external components, and so on. From a single supply of 1.8,V, a power of 200,mW is consumed and a single-ended swing of above 300,mV for each channel is achieved.

  • Low-Power High-Speed Data Serializer for Mobile TFT-LCD Driver ICs

    Jae-Hyuck WOO  Jae-Goo LEE  Young-Hyun JUN  Bai-Sun KONG  

     
    LETTER-Circuit Design

      Vol:
    E93-A No:12
      Page(s):
    2621-2622

    A novel data serializer is proposed for use in mobile TFT-LCD driver ICs. The proposed data serializer adopting hierarchical switching and repeater/separator schemes provides 82% power reduction and 27% speed improvement with 27% area saving. Measured overall power consumption of a TFT-LCD driver IC with the proposed data serializer was reduced by as much as 49%.