In this study, under the assumption that a robot (1) has a remotely controllable yawing camera and (2) moves in a uniform linear motion, we propose and investigate how to improve the target recognition rate with the camera, by using wireless feedback loop control. We derive the allowable data rate theoretically, and, from the viewpoint of error and delay control, we propose and evaluate QoS-Hybrid ARQ schemes under data rate constraints. Specifically, the theoretical analyses derive the maximum data rate for sensing and control based on the channel capacity is derived with the Shannon-Hartley theorem and the path-loss channel model inside the human body, i.e. CM2 in IEEE 802.15.6 standard. Then, the adaptive error and delay control schemes, i.e. QoS-HARQ, are proposed considering the two constraints: the maximum data rate and the velocity of the camera's movement. For the performance evaluations, with the 3D robot simulator GAZEBO, we evaluated our proposed schemes in the two scenarios: the static environment and the dynamic environment. The results yield insights into how to improve the recognition rate considerably in each situation.

In robot vision system, enormously large computation power is required to perform three-dimensional (3-D) instrumentation and object recognition. However, many kinds of complex and irregular operations are required to make accurate 3-D instrumentation and object recognition in the conventional method for software implementation. In this paper, a VLSI-oriented Model-Based Robot Vision (MBRV) processor is proposed for high-speed and accurate 3-D instrumentation and object recognition. An input image is compared with two-dimensional (2-D) silhouette images which are generated from the 3-D object models by means of perspective projection. Because the MBRV algorithm always gives the candidates for the accurate 3-D instrumentation and object recognition result with simple and regular procedures, it is suitable for the implementation of the VLSI processor. Highly parallel architecture is employed in the VLSI processor to reduce the latency between the image acquisition and the output generation of the 3-D instrumentation and object recognition results. As a result, 3-D instrumentation and object recognition can be performed 10000 times faster than a 28.5 MIPS workstation.