IEICE TRANSACTIONS on Communications
A DSP-Based Reconfigurable SDR Platform for 3G Systems
Summary :
As the code division multiple access (CDMA) based third generation cellular infrastructure requires high performance signal processing in a baseband modem, an application-specific integrated circuit or a field-programmable gate array has commonly been used for chip rate processing. In this paper, the use of digital signal processors (DSP) is explored for a cdma2000 and a wideband CDMA channel modem with the goal of increasing flexibility. The design concepts of the prototype software-defined radio platform we implemented to estimate the potential and feasibility of commercial SDR platforms are presented. We discuss the hardware and software architecture of the platform, considerations for reconfigurability, and the test results. We also address practical issues for real-time chip rate processing and optimization schemes of DSP software, and provide detailed measurement results of DSP performance.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E88-B No.2 pp.678-686
- Publication Date
- 2005/02/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietcom/e88-b.2.678
- Type of Manuscript
- PAPER
- Category
- Wireless Communication Technologies
Authors
Keyword
Latest Issue
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Gweon-Do JO, Min-Joung SHEEN, Seung-Hwan LEE, Kyoung-Rok CHO, "A DSP-Based Reconfigurable SDR Platform for 3G Systems" in IEICE TRANSACTIONS on Communications,
vol. E88-B, no. 2, pp. 678-686, February 2005, doi: 10.1093/ietcom/e88-b.2.678.
Abstract: As the code division multiple access (CDMA) based third generation cellular infrastructure requires high performance signal processing in a baseband modem, an application-specific integrated circuit or a field-programmable gate array has commonly been used for chip rate processing. In this paper, the use of digital signal processors (DSP) is explored for a cdma2000 and a wideband CDMA channel modem with the goal of increasing flexibility. The design concepts of the prototype software-defined radio platform we implemented to estimate the potential and feasibility of commercial SDR platforms are presented. We discuss the hardware and software architecture of the platform, considerations for reconfigurability, and the test results. We also address practical issues for real-time chip rate processing and optimization schemes of DSP software, and provide detailed measurement results of DSP performance.
URL: https://global.ieice.org/en_transactions/communications/10.1093/ietcom/e88-b.2.678/_p
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@ARTICLE{e88-b_2_678,
author={Gweon-Do JO, Min-Joung SHEEN, Seung-Hwan LEE, Kyoung-Rok CHO, },
journal={IEICE TRANSACTIONS on Communications},
title={A DSP-Based Reconfigurable SDR Platform for 3G Systems},
year={2005},
volume={E88-B},
number={2},
pages={678-686},
abstract={As the code division multiple access (CDMA) based third generation cellular infrastructure requires high performance signal processing in a baseband modem, an application-specific integrated circuit or a field-programmable gate array has commonly been used for chip rate processing. In this paper, the use of digital signal processors (DSP) is explored for a cdma2000 and a wideband CDMA channel modem with the goal of increasing flexibility. The design concepts of the prototype software-defined radio platform we implemented to estimate the potential and feasibility of commercial SDR platforms are presented. We discuss the hardware and software architecture of the platform, considerations for reconfigurability, and the test results. We also address practical issues for real-time chip rate processing and optimization schemes of DSP software, and provide detailed measurement results of DSP performance.},
keywords={},
doi={10.1093/ietcom/e88-b.2.678},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - A DSP-Based Reconfigurable SDR Platform for 3G Systems
T2 - IEICE TRANSACTIONS on Communications
SP - 678
EP - 686
AU - Gweon-Do JO
AU - Min-Joung SHEEN
AU - Seung-Hwan LEE
AU - Kyoung-Rok CHO
PY - 2005
DO - 10.1093/ietcom/e88-b.2.678
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E88-B
IS - 2
JA - IEICE TRANSACTIONS on Communications
Y1 - February 2005
AB - As the code division multiple access (CDMA) based third generation cellular infrastructure requires high performance signal processing in a baseband modem, an application-specific integrated circuit or a field-programmable gate array has commonly been used for chip rate processing. In this paper, the use of digital signal processors (DSP) is explored for a cdma2000 and a wideband CDMA channel modem with the goal of increasing flexibility. The design concepts of the prototype software-defined radio platform we implemented to estimate the potential and feasibility of commercial SDR platforms are presented. We discuss the hardware and software architecture of the platform, considerations for reconfigurability, and the test results. We also address practical issues for real-time chip rate processing and optimization schemes of DSP software, and provide detailed measurement results of DSP performance.
ER -
English
