IEICE TRANSACTIONS on Communications
Performance Evaluation of Block SR-ARQ Scheme in High-Speed Communication Environments
Summary :
In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.
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- IEICE TRANSACTIONS on Communications Vol.E75-B No.12 pp.1338-1345
- Publication Date
- 1992/12/25
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- Special Section PAPER (Special Issue on Teletraffic)
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Chunxiang CHEN, Masaharu KOMATSU, Kozo KINOSHITA, "Performance Evaluation of Block SR-ARQ Scheme in High-Speed Communication Environments" in IEICE TRANSACTIONS on Communications,
vol. E75-B, no. 12, pp. 1338-1345, December 1992, doi: .
Abstract: In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e75-b_12_1338/_p
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@ARTICLE{e75-b_12_1338,
author={Chunxiang CHEN, Masaharu KOMATSU, Kozo KINOSHITA, },
journal={IEICE TRANSACTIONS on Communications},
title={Performance Evaluation of Block SR-ARQ Scheme in High-Speed Communication Environments},
year={1992},
volume={E75-B},
number={12},
pages={1338-1345},
abstract={In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Performance Evaluation of Block SR-ARQ Scheme in High-Speed Communication Environments
T2 - IEICE TRANSACTIONS on Communications
SP - 1338
EP - 1345
AU - Chunxiang CHEN
AU - Masaharu KOMATSU
AU - Kozo KINOSHITA
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E75-B
IS - 12
JA - IEICE TRANSACTIONS on Communications
Y1 - December 1992
AB - In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.
ER -
English
