This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.
ATM, rerouting, protection, SDH, APS
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Ken'ichi SAKAMOTO, Morihito MIYAGI, Masahiro TAKATORI, Takahiko KOZAKI, Akihiko TAKASE, "Implementation of Fast ATM Protection Switching Function on ATM Nodes" in IEICE TRANSACTIONS on Communications,
vol. E81-B, no. 2, pp. 237-243, February 1998, doi: .
Abstract: This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e81-b_2_237/_p
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@ARTICLE{e81-b_2_237,
author={Ken'ichi SAKAMOTO, Morihito MIYAGI, Masahiro TAKATORI, Takahiko KOZAKI, Akihiko TAKASE, },
journal={IEICE TRANSACTIONS on Communications},
title={Implementation of Fast ATM Protection Switching Function on ATM Nodes},
year={1998},
volume={E81-B},
number={2},
pages={237-243},
abstract={This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Implementation of Fast ATM Protection Switching Function on ATM Nodes
T2 - IEICE TRANSACTIONS on Communications
SP - 237
EP - 243
AU - Ken'ichi SAKAMOTO
AU - Morihito MIYAGI
AU - Masahiro TAKATORI
AU - Takahiko KOZAKI
AU - Akihiko TAKASE
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E81-B
IS - 2
JA - IEICE TRANSACTIONS on Communications
Y1 - February 1998
AB - This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.
ER -