This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.
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Sung-Rok YOON, Min Li HUANG, Sangho SEO, Hiroshi OCHI, Sin-Chong PARK, "A Fast Architecture Exploration Method for High Throughput IEEE 802.11e MAC Implementation Using SystemC" in IEICE TRANSACTIONS on Communications,
vol. E93-B, no. 10, pp. 2833-2836, October 2010, doi: 10.1587/transcom.E93.B.2833.
Abstract: This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.
URL: https://global.ieice.org/en_transactions/communications/10.1587/transcom.E93.B.2833/_p
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@ARTICLE{e93-b_10_2833,
author={Sung-Rok YOON, Min Li HUANG, Sangho SEO, Hiroshi OCHI, Sin-Chong PARK, },
journal={IEICE TRANSACTIONS on Communications},
title={A Fast Architecture Exploration Method for High Throughput IEEE 802.11e MAC Implementation Using SystemC},
year={2010},
volume={E93-B},
number={10},
pages={2833-2836},
abstract={This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.},
keywords={},
doi={10.1587/transcom.E93.B.2833},
ISSN={1745-1345},
month={October},}
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TY - JOUR
TI - A Fast Architecture Exploration Method for High Throughput IEEE 802.11e MAC Implementation Using SystemC
T2 - IEICE TRANSACTIONS on Communications
SP - 2833
EP - 2836
AU - Sung-Rok YOON
AU - Min Li HUANG
AU - Sangho SEO
AU - Hiroshi OCHI
AU - Sin-Chong PARK
PY - 2010
DO - 10.1587/transcom.E93.B.2833
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E93-B
IS - 10
JA - IEICE TRANSACTIONS on Communications
Y1 - October 2010
AB - This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.
ER -