A Frequency Offset Estimation and Compensation Scheme for MB-OFDM UWB Modem

Do-Hoon KIM; Kyu-Min KANG; Chungyong LEE

doi:10.1587/transcom.E95.B.1015

A Frequency Offset Estimation and Compensation Scheme for MB-OFDM UWB Modem

Do-Hoon KIM, Kyu-Min KANG, Chungyong LEE

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We present a carrier and sampling frequency offset estimation and compensation scheme for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem. We first perform initial carrier frequency offset (CFO) estimation and compensation during the preamble period, and then conduct the estimation and compensation of the residual CFO and sampling frequency offset (SFO) during the payload period. The proposed design scheme reduces the logic gate count of the frequency offset compensation block by about 10%, while it gives almost the same performance at the packet error rate (PER) of 10^-4 in the CM1 channel. The frequency offset estimation and compensation block is implemented using 90 nm CMOS technology and tested.

Publication: IEICE TRANSACTIONS on Communications Vol.E95-B No.3 pp.1015-1018

Publication Date: 2012/03/01

Publicized

Online ISSN: 1745-1345

DOI: 10.1587/transcom.E95.B.1015

Type of Manuscript: LETTER

Category: Wireless Communication Technologies

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Do-Hoon KIM, Kyu-Min KANG, Chungyong LEE, "A Frequency Offset Estimation and Compensation Scheme for MB-OFDM UWB Modem" in IEICE TRANSACTIONS on Communications, vol. E95-B, no. 3, pp. 1015-1018, March 2012, doi: 10.1587/transcom.E95.B.1015.
Abstract: We present a carrier and sampling frequency offset estimation and compensation scheme for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem. We first perform initial carrier frequency offset (CFO) estimation and compensation during the preamble period, and then conduct the estimation and compensation of the residual CFO and sampling frequency offset (SFO) during the payload period. The proposed design scheme reduces the logic gate count of the frequency offset compensation block by about 10%, while it gives almost the same performance at the packet error rate (PER) of 10^-4 in the CM1 channel. The frequency offset estimation and compensation block is implemented using 90 nm CMOS technology and tested.
URL: https://global.ieice.org/en_transactions/communications/10.1587/transcom.E95.B.1015/_p

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@ARTICLE{e95-b_3_1015,
author={Do-Hoon KIM, Kyu-Min KANG, Chungyong LEE, },
journal={IEICE TRANSACTIONS on Communications},
title={A Frequency Offset Estimation and Compensation Scheme for MB-OFDM UWB Modem},
year={2012},
volume={E95-B},
number={3},
pages={1015-1018},
abstract={We present a carrier and sampling frequency offset estimation and compensation scheme for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem. We first perform initial carrier frequency offset (CFO) estimation and compensation during the preamble period, and then conduct the estimation and compensation of the residual CFO and sampling frequency offset (SFO) during the payload period. The proposed design scheme reduces the logic gate count of the frequency offset compensation block by about 10%, while it gives almost the same performance at the packet error rate (PER) of 10^-4 in the CM1 channel. The frequency offset estimation and compensation block is implemented using 90 nm CMOS technology and tested.},
keywords={},
doi={10.1587/transcom.E95.B.1015},
ISSN={1745-1345},
month={March},}

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TY - JOUR
TI - A Frequency Offset Estimation and Compensation Scheme for MB-OFDM UWB Modem
T2 - IEICE TRANSACTIONS on Communications
SP - 1015
EP - 1018
AU - Do-Hoon KIM
AU - Kyu-Min KANG
AU - Chungyong LEE
PY - 2012
DO - 10.1587/transcom.E95.B.1015
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E95-B
IS - 3
JA - IEICE TRANSACTIONS on Communications
Y1 - March 2012
AB - We present a carrier and sampling frequency offset estimation and compensation scheme for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem. We first perform initial carrier frequency offset (CFO) estimation and compensation during the preamble period, and then conduct the estimation and compensation of the residual CFO and sampling frequency offset (SFO) during the payload period. The proposed design scheme reduces the logic gate count of the frequency offset compensation block by about 10%, while it gives almost the same performance at the packet error rate (PER) of 10^-4 in the CM1 channel. The frequency offset estimation and compensation block is implemented using 90 nm CMOS technology and tested.
ER -