IEICE TRANSACTIONS on Electronics
Broadband Multi-Way Microstrip Power Dividers
Summary :
This paper treats multi-way microstrip power dividers composed of multi-step, multi-furcation, and corners. Since the design procedure is founded on the planar circuit approach in combination with the segmentation method, optimization of the circuit configuration can be performed in a reasonable short computation time when applying the Powell's optimization algorithm. Actually, broadband 3- and 4-way power dividers with mitered bends are designed, and fractional bandwidths of about 90% and 100% are realized for the power-split imbalance less than 0.2 dB and the return loss better than -20 dB, respectively. The validity of the design results is confirmed by an EM-simulator (HFSS) and experiments.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E88-C No.1 pp.20-27
- Publication Date
- 2005/01/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietele/e88-c.1.20
- Type of Manuscript
- Special Section PAPER (Special Section on Recent Trends of Microwave and Millimeter-Wave Passive Circuit Components and Technologies for Improvement of Characteristics)
- Category
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Mitsuyoshi KISHIHARA, Kuniyoshi YAMANE, Isao OHTA, Tadashi KAWAI, "Broadband Multi-Way Microstrip Power Dividers" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 1, pp. 20-27, January 2005, doi: 10.1093/ietele/e88-c.1.20.
Abstract: This paper treats multi-way microstrip power dividers composed of multi-step, multi-furcation, and corners. Since the design procedure is founded on the planar circuit approach in combination with the segmentation method, optimization of the circuit configuration can be performed in a reasonable short computation time when applying the Powell's optimization algorithm. Actually, broadband 3- and 4-way power dividers with mitered bends are designed, and fractional bandwidths of about 90% and 100% are realized for the power-split imbalance less than 0.2 dB and the return loss better than -20 dB, respectively. The validity of the design results is confirmed by an EM-simulator (HFSS) and experiments.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.1.20/_p
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@ARTICLE{e88-c_1_20,
author={Mitsuyoshi KISHIHARA, Kuniyoshi YAMANE, Isao OHTA, Tadashi KAWAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Broadband Multi-Way Microstrip Power Dividers},
year={2005},
volume={E88-C},
number={1},
pages={20-27},
abstract={This paper treats multi-way microstrip power dividers composed of multi-step, multi-furcation, and corners. Since the design procedure is founded on the planar circuit approach in combination with the segmentation method, optimization of the circuit configuration can be performed in a reasonable short computation time when applying the Powell's optimization algorithm. Actually, broadband 3- and 4-way power dividers with mitered bends are designed, and fractional bandwidths of about 90% and 100% are realized for the power-split imbalance less than 0.2 dB and the return loss better than -20 dB, respectively. The validity of the design results is confirmed by an EM-simulator (HFSS) and experiments.},
keywords={},
doi={10.1093/ietele/e88-c.1.20},
ISSN={},
month={January},}
Copy
TY - JOUR
TI - Broadband Multi-Way Microstrip Power Dividers
T2 - IEICE TRANSACTIONS on Electronics
SP - 20
EP - 27
AU - Mitsuyoshi KISHIHARA
AU - Kuniyoshi YAMANE
AU - Isao OHTA
AU - Tadashi KAWAI
PY - 2005
DO - 10.1093/ietele/e88-c.1.20
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2005
AB - This paper treats multi-way microstrip power dividers composed of multi-step, multi-furcation, and corners. Since the design procedure is founded on the planar circuit approach in combination with the segmentation method, optimization of the circuit configuration can be performed in a reasonable short computation time when applying the Powell's optimization algorithm. Actually, broadband 3- and 4-way power dividers with mitered bends are designed, and fractional bandwidths of about 90% and 100% are realized for the power-split imbalance less than 0.2 dB and the return loss better than -20 dB, respectively. The validity of the design results is confirmed by an EM-simulator (HFSS) and experiments.
ER -
English
