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IEICE TRANSACTIONS on Electronics

High Ruggedness Power MOSFET Design by a Self-Align p+ Process

Feng-Tso CHIEN, Ming-Hung LAI, Shih-Tzung SU, Kou-Way TU, Ching-Ling CHENG

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Summary :

A new high ruggedness Power MOSFET structure with a planar oxide self align p+ implant structure is proposed and discussed. We compare the proposed self-align process with the conventional p+ MASK process and contact p+ implant process. It is shown that the self align implant structure with a wide p+ area can reduce the parasitic BJT effect and, therefore, improve the device's avalanche energy capability, which is required for inductive load circuits. Based on the unclamped inductive load switching measurement results, the proposed device avalanche energy with self align p+ implant process is improved about 355% as compared to the traditional one.

Publication
IEICE TRANSACTIONS on Electronics Vol.E88-C No.4 pp.694-698
Publication Date
2005/04/01
Publicized
Online ISSN
DOI
10.1093/ietele/e88-c.4.694
Type of Manuscript
Special Section PAPER (Special Section on Fundamental and Application of Advanced Semiconductor Devices)
Category
Power Devices

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