Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors

Apisak WORAPISHET; Kornika MOOLPHO; Jitkasame NGARMNIL

doi:10.1093/ietele/e88-c.6.1148

Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors

Apisak WORAPISHET, Kornika MOOLPHO, Jitkasame NGARMNIL

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A structure of a track-and-hold (T/H) circuit based on a pair of complementary floating-gate (FG) MOS transistors is introduced. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches, leading to efficient realization of numerous baseband functions in modern communication systems. The detailed operation and performance analysis of the FG T/H circuit are given. Functional verification of the circuit is provided through a breadboard experiment. The effectiveness of the circuit is verified via simulations where the single T/H cell operating at 10 MHz clock frequency exhibits gain variation less than 0.13% and a dynamic range over 71 dB with the coupling capacitance of 300 fF at 1.5 V supply and 12.75 µW power consumption. As a demonstration on its practical viability, the designed FG T/H cell was also utilized to realize a 10 MS/s 7-tap analog correlator for possible use in modern communication applications.

Publication: IEICE TRANSACTIONS on Electronics Vol.E88-C No.6 pp.1148-1153

Publication Date: 2005/06/01

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DOI: 10.1093/ietele/e88-c.6.1148

Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)

Category: Building Block

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Apisak WORAPISHET, Kornika MOOLPHO, Jitkasame NGARMNIL, "Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors" in IEICE TRANSACTIONS on Electronics, vol. E88-C, no. 6, pp. 1148-1153, June 2005, doi: 10.1093/ietele/e88-c.6.1148.
Abstract: A structure of a track-and-hold (T/H) circuit based on a pair of complementary floating-gate (FG) MOS transistors is introduced. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches, leading to efficient realization of numerous baseband functions in modern communication systems. The detailed operation and performance analysis of the FG T/H circuit are given. Functional verification of the circuit is provided through a breadboard experiment. The effectiveness of the circuit is verified via simulations where the single T/H cell operating at 10 MHz clock frequency exhibits gain variation less than 0.13% and a dynamic range over 71 dB with the coupling capacitance of 300 fF at 1.5 V supply and 12.75 µW power consumption. As a demonstration on its practical viability, the designed FG T/H cell was also utilized to realize a 10 MS/s 7-tap analog correlator for possible use in modern communication applications.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.6.1148/_p

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@ARTICLE{e88-c_6_1148,
author={Apisak WORAPISHET, Kornika MOOLPHO, Jitkasame NGARMNIL, },
journal={IEICE TRANSACTIONS on Electronics},
title={Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors},
year={2005},
volume={E88-C},
number={6},
pages={1148-1153},
abstract={A structure of a track-and-hold (T/H) circuit based on a pair of complementary floating-gate (FG) MOS transistors is introduced. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches, leading to efficient realization of numerous baseband functions in modern communication systems. The detailed operation and performance analysis of the FG T/H circuit are given. Functional verification of the circuit is provided through a breadboard experiment. The effectiveness of the circuit is verified via simulations where the single T/H cell operating at 10 MHz clock frequency exhibits gain variation less than 0.13% and a dynamic range over 71 dB with the coupling capacitance of 300 fF at 1.5 V supply and 12.75 µW power consumption. As a demonstration on its practical viability, the designed FG T/H cell was also utilized to realize a 10 MS/s 7-tap analog correlator for possible use in modern communication applications.},
keywords={},
doi={10.1093/ietele/e88-c.6.1148},
ISSN={},
month={June},}

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TY - JOUR
TI - Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors
T2 - IEICE TRANSACTIONS on Electronics
SP - 1148
EP - 1153
AU - Apisak WORAPISHET
AU - Kornika MOOLPHO
AU - Jitkasame NGARMNIL
PY - 2005
DO - 10.1093/ietele/e88-c.6.1148
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2005
AB - A structure of a track-and-hold (T/H) circuit based on a pair of complementary floating-gate (FG) MOS transistors is introduced. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches, leading to efficient realization of numerous baseband functions in modern communication systems. The detailed operation and performance analysis of the FG T/H circuit are given. Functional verification of the circuit is provided through a breadboard experiment. The effectiveness of the circuit is verified via simulations where the single T/H cell operating at 10 MHz clock frequency exhibits gain variation less than 0.13% and a dynamic range over 71 dB with the coupling capacitance of 300 fF at 1.5 V supply and 12.75 µW power consumption. As a demonstration on its practical viability, the designed FG T/H cell was also utilized to realize a 10 MS/s 7-tap analog correlator for possible use in modern communication applications.
ER -