IEICE TRANSACTIONS on Electronics
Design of Analog Current-Mode Loser-Take-All Circuit
Summary :
A CMOS circuit is proposed which takes multiple analog input currents and extracts minimum input current at the output. It is very fast and requires no subtraction from the constant current source. It exhibits O(N) complexity and uses only 4
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E89-C No.6 pp.819-822
- Publication Date
- 2006/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e89-c.6.819
- Type of Manuscript
- Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
- Category
Authors
Keyword
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Mohsen ASLONI, Abdollah KHOEI, Khayrollah HADIDI, "Design of Analog Current-Mode Loser-Take-All Circuit" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 6, pp. 819-822, June 2006, doi: 10.1093/ietele/e89-c.6.819.
Abstract: A CMOS circuit is proposed which takes multiple analog input currents and extracts minimum input current at the output. It is very fast and requires no subtraction from the constant current source. It exhibits O(N) complexity and uses only 4
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.6.819/_p
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@ARTICLE{e89-c_6_819,
author={Mohsen ASLONI, Abdollah KHOEI, Khayrollah HADIDI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design of Analog Current-Mode Loser-Take-All Circuit},
year={2006},
volume={E89-C},
number={6},
pages={819-822},
abstract={A CMOS circuit is proposed which takes multiple analog input currents and extracts minimum input current at the output. It is very fast and requires no subtraction from the constant current source. It exhibits O(N) complexity and uses only 4
keywords={},
doi={10.1093/ietele/e89-c.6.819},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - Design of Analog Current-Mode Loser-Take-All Circuit
T2 - IEICE TRANSACTIONS on Electronics
SP - 819
EP - 822
AU - Mohsen ASLONI
AU - Abdollah KHOEI
AU - Khayrollah HADIDI
PY - 2006
DO - 10.1093/ietele/e89-c.6.819
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2006
AB - A CMOS circuit is proposed which takes multiple analog input currents and extracts minimum input current at the output. It is very fast and requires no subtraction from the constant current source. It exhibits O(N) complexity and uses only 4
ER -
English
