IEICE TRANSACTIONS on Electronics
A 90 nm LUT Array for Speed and Yield Enhancement by Utilizing Within-Die Delay Variations
Summary :
In this paper, we show that speed and yield of reconfigurable devices can be enhanced by utilizing within-die (WID) delay variations. An LUT Array LSI is fabricated to confirm whether FPGAs have clear WID variations to be utilized. We can measure delay variations by counting the number of LUTs a signal propagates within a certain time. Clear die-to-die (D2D) and WID variations are observed. We propose a variation model from the measurement results. Adequacy of the model is discussed from randomness of the random component. Effect of the speed and yield enhancement is confirmed using the proposed model. Yield increases from 80.0% to 100.0% by optimizing configurations.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E90-C No.4 pp.699-707
- Publication Date
- 2007/04/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e90-c.4.699
- Type of Manuscript
- Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
- Category
- Digital
Authors
Keyword
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Kazuya KATSUKI, Manabu KOTANI, Kazutoshi KOBAYASHI, Hidetoshi ONODERA, "A 90 nm LUT Array for Speed and Yield Enhancement by Utilizing Within-Die Delay Variations" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 4, pp. 699-707, April 2007, doi: 10.1093/ietele/e90-c.4.699.
Abstract: In this paper, we show that speed and yield of reconfigurable devices can be enhanced by utilizing within-die (WID) delay variations. An LUT Array LSI is fabricated to confirm whether FPGAs have clear WID variations to be utilized. We can measure delay variations by counting the number of LUTs a signal propagates within a certain time. Clear die-to-die (D2D) and WID variations are observed. We propose a variation model from the measurement results. Adequacy of the model is discussed from randomness of the random component. Effect of the speed and yield enhancement is confirmed using the proposed model. Yield increases from 80.0% to 100.0% by optimizing configurations.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.4.699/_p
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@ARTICLE{e90-c_4_699,
author={Kazuya KATSUKI, Manabu KOTANI, Kazutoshi KOBAYASHI, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 90 nm LUT Array for Speed and Yield Enhancement by Utilizing Within-Die Delay Variations},
year={2007},
volume={E90-C},
number={4},
pages={699-707},
abstract={In this paper, we show that speed and yield of reconfigurable devices can be enhanced by utilizing within-die (WID) delay variations. An LUT Array LSI is fabricated to confirm whether FPGAs have clear WID variations to be utilized. We can measure delay variations by counting the number of LUTs a signal propagates within a certain time. Clear die-to-die (D2D) and WID variations are observed. We propose a variation model from the measurement results. Adequacy of the model is discussed from randomness of the random component. Effect of the speed and yield enhancement is confirmed using the proposed model. Yield increases from 80.0% to 100.0% by optimizing configurations.},
keywords={},
doi={10.1093/ietele/e90-c.4.699},
ISSN={1745-1353},
month={April},}
Copy
TY - JOUR
TI - A 90 nm LUT Array for Speed and Yield Enhancement by Utilizing Within-Die Delay Variations
T2 - IEICE TRANSACTIONS on Electronics
SP - 699
EP - 707
AU - Kazuya KATSUKI
AU - Manabu KOTANI
AU - Kazutoshi KOBAYASHI
AU - Hidetoshi ONODERA
PY - 2007
DO - 10.1093/ietele/e90-c.4.699
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2007
AB - In this paper, we show that speed and yield of reconfigurable devices can be enhanced by utilizing within-die (WID) delay variations. An LUT Array LSI is fabricated to confirm whether FPGAs have clear WID variations to be utilized. We can measure delay variations by counting the number of LUTs a signal propagates within a certain time. Clear die-to-die (D2D) and WID variations are observed. We propose a variation model from the measurement results. Adequacy of the model is discussed from randomness of the random component. Effect of the speed and yield enhancement is confirmed using the proposed model. Yield increases from 80.0% to 100.0% by optimizing configurations.
ER -
English
