A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process
Summary :
A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E90-C No.6 pp.1304-1306
- Publication Date
- 2007/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e90-c.6.1304
- Type of Manuscript
- Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
Authors
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Toru CHOI, Tatsuya SAKAMOTO, Yasuhiro SUGIMOTO, "A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 6, pp. 1304-1306, June 2007, doi: 10.1093/ietele/e90-c.6.1304.
Abstract: A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.6.1304/_p
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@ARTICLE{e90-c_6_1304,
author={Toru CHOI, Tatsuya SAKAMOTO, Yasuhiro SUGIMOTO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process},
year={2007},
volume={E90-C},
number={6},
pages={1304-1306},
abstract={A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.},
keywords={},
doi={10.1093/ietele/e90-c.6.1304},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process
T2 - IEICE TRANSACTIONS on Electronics
SP - 1304
EP - 1306
AU - Toru CHOI
AU - Tatsuya SAKAMOTO
AU - Yasuhiro SUGIMOTO
PY - 2007
DO - 10.1093/ietele/e90-c.6.1304
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2007
AB - A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.
ER -
English
