This paper describes the innovation in single chip package design for mainframe computers coupled with major advances in "Controlled Collapse Chip Connection (C4)" technology, multilayer ceramic technology, and thin-film technology. C4 technology allows the LSI chips to be connected with high integration and high-performance. Applying C4 technology to chip-to-package and package-to-module interconnections provides a higher level of connection pads out from a small package. A new material 96.5 Sn/3.5 Ag for solder joints has been developed to facilitate reliable interconnection where thermal fatigue might have been a problem. The microstructure of a fractured surface and the estimation based on "Finite Element Method (FEM)" are correlated. New material and a process of mullite-glass has been developed to attain a thermal expansion coefficient close to that of silicon. The metallized ceramic technology for the mullite-glass can be applied to the substrate of LSI packages as well as multilayer ceramic multi-chip modules. Thin-film technology has been studied to form high-density wiring on package substrates. Using photolithography technique, it is possible to pattern pads accurately enough for connection to an LSI chip. The polyimide-Al combination can be patterned by subtractive technique using liquid etchants and sputtering. The via formation process is simplified using a photosensitive polyimide so that the fabrication process for multilayer wiring becomes suitable for mass production. Hitachi recently announced the HITAC M-880 Processor Unit which makes extensive use of these technologies. The general features of the LSI package "Micro Carrier for LSI Chip (MCC)" is also outlined.
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Kenji TAKEDA, Masahide HARADA, Tsuyoshi FUJITA, Takashi INOUE, "LSI Packaging Technology for Mainframe Computers" in IEICE TRANSACTIONS on Electronics,
vol. E74-C, no. 8, pp. 2337-2343, August 1991, doi: .
Abstract: This paper describes the innovation in single chip package design for mainframe computers coupled with major advances in "Controlled Collapse Chip Connection (C4)" technology, multilayer ceramic technology, and thin-film technology. C4 technology allows the LSI chips to be connected with high integration and high-performance. Applying C4 technology to chip-to-package and package-to-module interconnections provides a higher level of connection pads out from a small package. A new material 96.5 Sn/3.5 Ag for solder joints has been developed to facilitate reliable interconnection where thermal fatigue might have been a problem. The microstructure of a fractured surface and the estimation based on "Finite Element Method (FEM)" are correlated. New material and a process of mullite-glass has been developed to attain a thermal expansion coefficient close to that of silicon. The metallized ceramic technology for the mullite-glass can be applied to the substrate of LSI packages as well as multilayer ceramic multi-chip modules. Thin-film technology has been studied to form high-density wiring on package substrates. Using photolithography technique, it is possible to pattern pads accurately enough for connection to an LSI chip. The polyimide-Al combination can be patterned by subtractive technique using liquid etchants and sputtering. The via formation process is simplified using a photosensitive polyimide so that the fabrication process for multilayer wiring becomes suitable for mass production. Hitachi recently announced the HITAC M-880 Processor Unit which makes extensive use of these technologies. The general features of the LSI package "Micro Carrier for LSI Chip (MCC)" is also outlined.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e74-c_8_2337/_p
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@ARTICLE{e74-c_8_2337,
author={Kenji TAKEDA, Masahide HARADA, Tsuyoshi FUJITA, Takashi INOUE, },
journal={IEICE TRANSACTIONS on Electronics},
title={LSI Packaging Technology for Mainframe Computers},
year={1991},
volume={E74-C},
number={8},
pages={2337-2343},
abstract={This paper describes the innovation in single chip package design for mainframe computers coupled with major advances in "Controlled Collapse Chip Connection (C4)" technology, multilayer ceramic technology, and thin-film technology. C4 technology allows the LSI chips to be connected with high integration and high-performance. Applying C4 technology to chip-to-package and package-to-module interconnections provides a higher level of connection pads out from a small package. A new material 96.5 Sn/3.5 Ag for solder joints has been developed to facilitate reliable interconnection where thermal fatigue might have been a problem. The microstructure of a fractured surface and the estimation based on "Finite Element Method (FEM)" are correlated. New material and a process of mullite-glass has been developed to attain a thermal expansion coefficient close to that of silicon. The metallized ceramic technology for the mullite-glass can be applied to the substrate of LSI packages as well as multilayer ceramic multi-chip modules. Thin-film technology has been studied to form high-density wiring on package substrates. Using photolithography technique, it is possible to pattern pads accurately enough for connection to an LSI chip. The polyimide-Al combination can be patterned by subtractive technique using liquid etchants and sputtering. The via formation process is simplified using a photosensitive polyimide so that the fabrication process for multilayer wiring becomes suitable for mass production. Hitachi recently announced the HITAC M-880 Processor Unit which makes extensive use of these technologies. The general features of the LSI package "Micro Carrier for LSI Chip (MCC)" is also outlined.},
keywords={},
doi={},
ISSN={},
month={August},}
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TY - JOUR
TI - LSI Packaging Technology for Mainframe Computers
T2 - IEICE TRANSACTIONS on Electronics
SP - 2337
EP - 2343
AU - Kenji TAKEDA
AU - Masahide HARADA
AU - Tsuyoshi FUJITA
AU - Takashi INOUE
PY - 1991
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E74-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1991
AB - This paper describes the innovation in single chip package design for mainframe computers coupled with major advances in "Controlled Collapse Chip Connection (C4)" technology, multilayer ceramic technology, and thin-film technology. C4 technology allows the LSI chips to be connected with high integration and high-performance. Applying C4 technology to chip-to-package and package-to-module interconnections provides a higher level of connection pads out from a small package. A new material 96.5 Sn/3.5 Ag for solder joints has been developed to facilitate reliable interconnection where thermal fatigue might have been a problem. The microstructure of a fractured surface and the estimation based on "Finite Element Method (FEM)" are correlated. New material and a process of mullite-glass has been developed to attain a thermal expansion coefficient close to that of silicon. The metallized ceramic technology for the mullite-glass can be applied to the substrate of LSI packages as well as multilayer ceramic multi-chip modules. Thin-film technology has been studied to form high-density wiring on package substrates. Using photolithography technique, it is possible to pattern pads accurately enough for connection to an LSI chip. The polyimide-Al combination can be patterned by subtractive technique using liquid etchants and sputtering. The via formation process is simplified using a photosensitive polyimide so that the fabrication process for multilayer wiring becomes suitable for mass production. Hitachi recently announced the HITAC M-880 Processor Unit which makes extensive use of these technologies. The general features of the LSI package "Micro Carrier for LSI Chip (MCC)" is also outlined.
ER -