High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques

Manabu KOJIMA; Atsushi FUKURODA; Tetsu FUKANO; Naoshi HIGAKI; Tatsuya YAMAZAKI; Toshihiro SUGII; Yoshihiro ARIMOTO; Takashi ITO

High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques

Manabu KOJIMA, Atsushi FUKURODA, Tetsu FUKANO, Naoshi HIGAKI, Tatsuya YAMAZAKI, Toshihiro SUGII, Yoshihiro ARIMOTO, Takashi ITO

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We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO₂ to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO₂ using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.

Publication: IEICE TRANSACTIONS on Electronics Vol.E76-C No.4 pp.572-576

Publication Date: 1993/04/25

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Type of Manuscript: Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)

Category: Device Technology

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Manabu KOJIMA, Atsushi FUKURODA, Tetsu FUKANO, Naoshi HIGAKI, Tatsuya YAMAZAKI, Toshihiro SUGII, Yoshihiro ARIMOTO, Takashi ITO, "High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques" in IEICE TRANSACTIONS on Electronics, vol. E76-C, no. 4, pp. 572-576, April 1993, doi: .
Abstract: We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO₂ to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO₂ using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e76-c_4_572/_p

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@ARTICLE{e76-c_4_572,
author={Manabu KOJIMA, Atsushi FUKURODA, Tetsu FUKANO, Naoshi HIGAKI, Tatsuya YAMAZAKI, Toshihiro SUGII, Yoshihiro ARIMOTO, Takashi ITO, },
journal={IEICE TRANSACTIONS on Electronics},
title={High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques},
year={1993},
volume={E76-C},
number={4},
pages={572-576},
abstract={We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO₂ to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO₂ using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.},
keywords={},
doi={},
ISSN={},
month={April},}

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TY - JOUR
TI - High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques
T2 - IEICE TRANSACTIONS on Electronics
SP - 572
EP - 576
AU - Manabu KOJIMA
AU - Atsushi FUKURODA
AU - Tetsu FUKANO
AU - Naoshi HIGAKI
AU - Tatsuya YAMAZAKI
AU - Toshihiro SUGII
AU - Yoshihiro ARIMOTO
AU - Takashi ITO
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E76-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 1993
AB - We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO₂ to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO₂ using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.
ER -