Influence of Energy Transport Related Effects on NPN BJT Device Performance and ECL Gate Delay Analysed by 2D Parallel Mixed Level Device/Circuit Simulation
Summary :
The consequences of energy transport related effects like velocity overshoot on the performance of bipolar transistors have already been studied previously. So far however most of the applied models were only 1D and it remained unclear whether such effects would have a significant influence on important quantities like ECL gate delay accessible only on the circuit level. To the authors' best knowledge in this paper for the first time the consequences of energy transport related effects on the circuit level are investigated in a rigorous manner by mixed level device/circuit simulation incorporating full 2D numerical hydrodynamic models on the device level.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E77-C No.2 pp.200-205
- Publication Date
- 1994/02/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on 1993 VLSI Process and Device Modeling Workshop (VPAD 93))
- Category
- Coupled Device & Circuit Modeling
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Matthias STECHER, Bernd MEINERZHAGEN, Ingo BORK, Joachim M. J. KRÜCKEN, Peter MAAS, Walter L. ENGL, "Influence of Energy Transport Related Effects on NPN BJT Device Performance and ECL Gate Delay Analysed by 2D Parallel Mixed Level Device/Circuit Simulation" in IEICE TRANSACTIONS on Electronics,
vol. E77-C, no. 2, pp. 200-205, February 1994, doi: .
Abstract: The consequences of energy transport related effects like velocity overshoot on the performance of bipolar transistors have already been studied previously. So far however most of the applied models were only 1D and it remained unclear whether such effects would have a significant influence on important quantities like ECL gate delay accessible only on the circuit level. To the authors' best knowledge in this paper for the first time the consequences of energy transport related effects on the circuit level are investigated in a rigorous manner by mixed level device/circuit simulation incorporating full 2D numerical hydrodynamic models on the device level.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e77-c_2_200/_p
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@ARTICLE{e77-c_2_200,
author={Matthias STECHER, Bernd MEINERZHAGEN, Ingo BORK, Joachim M. J. KRÜCKEN, Peter MAAS, Walter L. ENGL, },
journal={IEICE TRANSACTIONS on Electronics},
title={Influence of Energy Transport Related Effects on NPN BJT Device Performance and ECL Gate Delay Analysed by 2D Parallel Mixed Level Device/Circuit Simulation},
year={1994},
volume={E77-C},
number={2},
pages={200-205},
abstract={The consequences of energy transport related effects like velocity overshoot on the performance of bipolar transistors have already been studied previously. So far however most of the applied models were only 1D and it remained unclear whether such effects would have a significant influence on important quantities like ECL gate delay accessible only on the circuit level. To the authors' best knowledge in this paper for the first time the consequences of energy transport related effects on the circuit level are investigated in a rigorous manner by mixed level device/circuit simulation incorporating full 2D numerical hydrodynamic models on the device level.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - Influence of Energy Transport Related Effects on NPN BJT Device Performance and ECL Gate Delay Analysed by 2D Parallel Mixed Level Device/Circuit Simulation
T2 - IEICE TRANSACTIONS on Electronics
SP - 200
EP - 205
AU - Matthias STECHER
AU - Bernd MEINERZHAGEN
AU - Ingo BORK
AU - Joachim M. J. KRÜCKEN
AU - Peter MAAS
AU - Walter L. ENGL
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 1994
AB - The consequences of energy transport related effects like velocity overshoot on the performance of bipolar transistors have already been studied previously. So far however most of the applied models were only 1D and it remained unclear whether such effects would have a significant influence on important quantities like ECL gate delay accessible only on the circuit level. To the authors' best knowledge in this paper for the first time the consequences of energy transport related effects on the circuit level are investigated in a rigorous manner by mixed level device/circuit simulation incorporating full 2D numerical hydrodynamic models on the device level.
ER -
English
