A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching

Naohito YOSHIDA; Toshiaki KITANO; Yoshitsugu YAMAMOTO; Takayuki KATOH; Hiroyuki MINAMI; Takuo KASHIWA; Takuji SONODA; Hirozo TAKANO; Osamu ISHIHARA

A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching

Naohito YOSHIDA, Toshiaki KITANO, Yoshitsugu YAMAMOTO, Takayuki KATOH, Hiroyuki MINAMI, Takuo KASHIWA, Takuji SONODA, Hirozo TAKANO, Osamu ISHIHARA

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A 0.15 µm T-shaped gate AlInAs/InGaAs high electron mobility transistor (HEMT) with an excellent RF performance has been developed using selective wet gate recess etching. The gate recess is formed by a pH-adjusted citric acid/NH₄OH/H₂O₂ mixture with an etching selectivity of more than 30 for InGaAs over AlInAs. The standard deviation of saturation drain current (I_dss) is as small as 3.2 mA for an average I_dss of 47 mA on a 3 inch diameter InP wafer. The etching time for recess formation is optimized and an ft of 130 GHz and an MSG of 10 dB at 60 GHz are obtained. The extremely low minimum noise figure (F_min) of 0.9 dB with an associated gain (Ga) of 7.0 dB has been achieved at 60 GHz for a SiON-passivated device. This noise performance is comparable to the lowest value of F_min ever reported for an AlInAs/InGaAs HEMT with a passivation film.

Publication: IEICE TRANSACTIONS on Electronics Vol.E78-C No.9 pp.1279-1285

Publication Date: 1995/09/25

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Category: Semiconductor Materials and Devices

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Naohito YOSHIDA, Toshiaki KITANO, Yoshitsugu YAMAMOTO, Takayuki KATOH, Hiroyuki MINAMI, Takuo KASHIWA, Takuji SONODA, Hirozo TAKANO, Osamu ISHIHARA, "A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching" in IEICE TRANSACTIONS on Electronics, vol. E78-C, no. 9, pp. 1279-1285, September 1995, doi: .
Abstract: A 0.15 µm T-shaped gate AlInAs/InGaAs high electron mobility transistor (HEMT) with an excellent RF performance has been developed using selective wet gate recess etching. The gate recess is formed by a pH-adjusted citric acid/NH₄OH/H₂O₂ mixture with an etching selectivity of more than 30 for InGaAs over AlInAs. The standard deviation of saturation drain current (I_dss) is as small as 3.2 mA for an average I_dss of 47 mA on a 3 inch diameter InP wafer. The etching time for recess formation is optimized and an ft of 130 GHz and an MSG of 10 dB at 60 GHz are obtained. The extremely low minimum noise figure (F_min) of 0.9 dB with an associated gain (Ga) of 7.0 dB has been achieved at 60 GHz for a SiON-passivated device. This noise performance is comparable to the lowest value of F_min ever reported for an AlInAs/InGaAs HEMT with a passivation film.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e78-c_9_1279/_p

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@ARTICLE{e78-c_9_1279,
author={Naohito YOSHIDA, Toshiaki KITANO, Yoshitsugu YAMAMOTO, Takayuki KATOH, Hiroyuki MINAMI, Takuo KASHIWA, Takuji SONODA, Hirozo TAKANO, Osamu ISHIHARA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching},
year={1995},
volume={E78-C},
number={9},
pages={1279-1285},
abstract={A 0.15 µm T-shaped gate AlInAs/InGaAs high electron mobility transistor (HEMT) with an excellent RF performance has been developed using selective wet gate recess etching. The gate recess is formed by a pH-adjusted citric acid/NH₄OH/H₂O₂ mixture with an etching selectivity of more than 30 for InGaAs over AlInAs. The standard deviation of saturation drain current (I_dss) is as small as 3.2 mA for an average I_dss of 47 mA on a 3 inch diameter InP wafer. The etching time for recess formation is optimized and an ft of 130 GHz and an MSG of 10 dB at 60 GHz are obtained. The extremely low minimum noise figure (F_min) of 0.9 dB with an associated gain (Ga) of 7.0 dB has been achieved at 60 GHz for a SiON-passivated device. This noise performance is comparable to the lowest value of F_min ever reported for an AlInAs/InGaAs HEMT with a passivation film.},
keywords={},
doi={},
ISSN={},
month={September},}

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TY - JOUR
TI - A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching
T2 - IEICE TRANSACTIONS on Electronics
SP - 1279
EP - 1285
AU - Naohito YOSHIDA
AU - Toshiaki KITANO
AU - Yoshitsugu YAMAMOTO
AU - Takayuki KATOH
AU - Hiroyuki MINAMI
AU - Takuo KASHIWA
AU - Takuji SONODA
AU - Hirozo TAKANO
AU - Osamu ISHIHARA
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E78-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1995
AB - A 0.15 µm T-shaped gate AlInAs/InGaAs high electron mobility transistor (HEMT) with an excellent RF performance has been developed using selective wet gate recess etching. The gate recess is formed by a pH-adjusted citric acid/NH₄OH/H₂O₂ mixture with an etching selectivity of more than 30 for InGaAs over AlInAs. The standard deviation of saturation drain current (I_dss) is as small as 3.2 mA for an average I_dss of 47 mA on a 3 inch diameter InP wafer. The etching time for recess formation is optimized and an ft of 130 GHz and an MSG of 10 dB at 60 GHz are obtained. The extremely low minimum noise figure (F_min) of 0.9 dB with an associated gain (Ga) of 7.0 dB has been achieved at 60 GHz for a SiON-passivated device. This noise performance is comparable to the lowest value of F_min ever reported for an AlInAs/InGaAs HEMT with a passivation film.
ER -