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IEICE TRANSACTIONS on Electronics

Operation Speed Consideration of Resonant Tunneling Logic Gate Based on Circuit Simulation

Yutaka OHNO, Shigeru KISHIMOTO, Takashi MIZUTANI, Koichi MAEZAWA

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Summary :

We analyzed the operation speed of the resonant tunneling logic gate, MOBILE, using a simple equivalent circuit model and varying parameters of I-V characteristics and capacitance of RTTs(resonant tunneling transistors). The switching time for large peak-to-valley(P/V)current ratios is smaller at small Vbmax(maximum bias voltage), but larger at large Vbmax than that for small P/V ratios in the case of present I-V characteristics with flat valley current. It is also demonstrated that the MOBILE operation fails if the bias voltage rises too fast, when the capacitance of the load and the driver is different due to the displacement current through the capacitance. These behaviors can be explained by considering the potential diagrams of the circuit.

Publication
IEICE TRANSACTIONS on Electronics Vol.E79-C No.11 pp.1530-1536
Publication Date
1996/11/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Issue on Quantum Effect Devices and Their Fabrication Technologies)
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