A binary counter circuit in the extended phase-mode logic (EPL) family is presented. The EPL family utilizes a single flux quantum as an information bit carrier. Numerical simulations show that a binary counter circuit with a Josephson critical current density of 1 kA/cm2 can operate up to a 30 GHz input signal. The circuit has been fabricated using Nb/AlOx/Nb Josephson junction technology. New interface circuits are employed in the fabricated chip. A low speed test result shows the correct operation of the binary counter.
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Takeshi ONOMI, Yoshinao MIZUGAKI, TsutomuYAMASHITA, Koji NAKAJIMA, "Binary Counter with New Interface Circuits in the Extended Phase-Mode Logic Family" in IEICE TRANSACTIONS on Electronics,
vol. E79-C, no. 9, pp. 1200-1205, September 1996, doi: .
Abstract: A binary counter circuit in the extended phase-mode logic (EPL) family is presented. The EPL family utilizes a single flux quantum as an information bit carrier. Numerical simulations show that a binary counter circuit with a Josephson critical current density of 1 kA/cm2 can operate up to a 30 GHz input signal. The circuit has been fabricated using Nb/AlOx/Nb Josephson junction technology. New interface circuits are employed in the fabricated chip. A low speed test result shows the correct operation of the binary counter.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e79-c_9_1200/_p
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@ARTICLE{e79-c_9_1200,
author={Takeshi ONOMI, Yoshinao MIZUGAKI, TsutomuYAMASHITA, Koji NAKAJIMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Binary Counter with New Interface Circuits in the Extended Phase-Mode Logic Family},
year={1996},
volume={E79-C},
number={9},
pages={1200-1205},
abstract={A binary counter circuit in the extended phase-mode logic (EPL) family is presented. The EPL family utilizes a single flux quantum as an information bit carrier. Numerical simulations show that a binary counter circuit with a Josephson critical current density of 1 kA/cm2 can operate up to a 30 GHz input signal. The circuit has been fabricated using Nb/AlOx/Nb Josephson junction technology. New interface circuits are employed in the fabricated chip. A low speed test result shows the correct operation of the binary counter.},
keywords={},
doi={},
ISSN={},
month={September},}
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TY - JOUR
TI - Binary Counter with New Interface Circuits in the Extended Phase-Mode Logic Family
T2 - IEICE TRANSACTIONS on Electronics
SP - 1200
EP - 1205
AU - Takeshi ONOMI
AU - Yoshinao MIZUGAKI
AU - TsutomuYAMASHITA
AU - Koji NAKAJIMA
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1996
AB - A binary counter circuit in the extended phase-mode logic (EPL) family is presented. The EPL family utilizes a single flux quantum as an information bit carrier. Numerical simulations show that a binary counter circuit with a Josephson critical current density of 1 kA/cm2 can operate up to a 30 GHz input signal. The circuit has been fabricated using Nb/AlOx/Nb Josephson junction technology. New interface circuits are employed in the fabricated chip. A low speed test result shows the correct operation of the binary counter.
ER -