IEICE TRANSACTIONS on Electronics
Soft-Core Processor Architecture for Embedded System Design
Summary :
In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E81-C No.9 pp.1416-1423
- Publication Date
- 1998/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
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Eko Fajar NURPRASETYO, Akihiko INOUE, Hiroyuki TOMIYAMA, Hiroto YASUURA, "Soft-Core Processor Architecture for Embedded System Design" in IEICE TRANSACTIONS on Electronics,
vol. E81-C, no. 9, pp. 1416-1423, September 1998, doi: .
Abstract: In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e81-c_9_1416/_p
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@ARTICLE{e81-c_9_1416,
author={Eko Fajar NURPRASETYO, Akihiko INOUE, Hiroyuki TOMIYAMA, Hiroto YASUURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Soft-Core Processor Architecture for Embedded System Design},
year={1998},
volume={E81-C},
number={9},
pages={1416-1423},
abstract={In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.},
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - Soft-Core Processor Architecture for Embedded System Design
T2 - IEICE TRANSACTIONS on Electronics
SP - 1416
EP - 1423
AU - Eko Fajar NURPRASETYO
AU - Akihiko INOUE
AU - Hiroyuki TOMIYAMA
AU - Hiroto YASUURA
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E81-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1998
AB - In the design of an embedded system, an architecture of core processor strongly affects the performance and cost of the total system. This paper discusses a scalable processor architecture, called soft-core processor, which can be tuned for a target system. System designers can optimize several design parameters such as the datapath width and instruction set, and generate customized processors for their application. Design of Bung-DLX as a prototype of soft-core processor is presented in this paper. An experiment of system design using our processor has shown that the optimized processor chip area halves when the critical path delay is reduced to one third of the original one.
ER -
English
