A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Ryusuke KAWANO, Naoaki YAMANAKA, Eiji OKI, Tomoaki KAWAMURA, "A Dynamic Reference Single-Ended ECL Input Interface Circuit for MCM-Based 80-Gbps ATM Switch" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 3, pp. 519-525, March 1999, doi: .
Abstract: A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_3_519/_p
Copy
@ARTICLE{e82-c_3_519,
author={Ryusuke KAWANO, Naoaki YAMANAKA, Eiji OKI, Tomoaki KAWAMURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Dynamic Reference Single-Ended ECL Input Interface Circuit for MCM-Based 80-Gbps ATM Switch},
year={1999},
volume={E82-C},
number={3},
pages={519-525},
abstract={A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - A Dynamic Reference Single-Ended ECL Input Interface Circuit for MCM-Based 80-Gbps ATM Switch
T2 - IEICE TRANSACTIONS on Electronics
SP - 519
EP - 525
AU - Ryusuke KAWANO
AU - Naoaki YAMANAKA
AU - Eiji OKI
AU - Tomoaki KAWAMURA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 1999
AB - A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.
ER -