Skew-Compensation Technique for Parallel Optical Interconnections

Takeshi SAKAMOTO; Nobuyuki TANAKA; Yasuhiro ANDO

Skew-Compensation Technique for Parallel Optical Interconnections

Takeshi SAKAMOTO, Nobuyuki TANAKA, Yasuhiro ANDO

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We have developed a low-latency, error-correcting-code-(ECC-)adaptable skew-compensation technique, which is needed for high-speed and long-distance parallel optical interconnections. A new frame-coding technique called shuffled mB1C encoding, which requires no clock-rate conversion circuit and no data buffering, and a new skew-measurement method which is suitable for ECC adaptation have been developed for the compensation. Full-digital skew-compensation circuits using these new techniques were able to compensate for a two-clock-cycle skew, even when one transmission channel was removed. The maximum latency for skew compensation was only five clock cycles.

Publication: IEICE TRANSACTIONS on Electronics Vol.E82-C No.8 pp.1428-1434

Publication Date: 1999/08/25

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Type of Manuscript: Special Section PAPER (Joint Special Issue on Recent Progress in Optoelectronics and Communications)

Category: Optical Systems and Technologies

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Takeshi SAKAMOTO, Nobuyuki TANAKA, Yasuhiro ANDO, "Skew-Compensation Technique for Parallel Optical Interconnections" in IEICE TRANSACTIONS on Electronics, vol. E82-C, no. 8, pp. 1428-1434, August 1999, doi: .
Abstract: We have developed a low-latency, error-correcting-code-(ECC-)adaptable skew-compensation technique, which is needed for high-speed and long-distance parallel optical interconnections. A new frame-coding technique called shuffled mB1C encoding, which requires no clock-rate conversion circuit and no data buffering, and a new skew-measurement method which is suitable for ECC adaptation have been developed for the compensation. Full-digital skew-compensation circuits using these new techniques were able to compensate for a two-clock-cycle skew, even when one transmission channel was removed. The maximum latency for skew compensation was only five clock cycles.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_8_1428/_p

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@ARTICLE{e82-c_8_1428,
author={Takeshi SAKAMOTO, Nobuyuki TANAKA, Yasuhiro ANDO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Skew-Compensation Technique for Parallel Optical Interconnections},
year={1999},
volume={E82-C},
number={8},
pages={1428-1434},
abstract={We have developed a low-latency, error-correcting-code-(ECC-)adaptable skew-compensation technique, which is needed for high-speed and long-distance parallel optical interconnections. A new frame-coding technique called shuffled mB1C encoding, which requires no clock-rate conversion circuit and no data buffering, and a new skew-measurement method which is suitable for ECC adaptation have been developed for the compensation. Full-digital skew-compensation circuits using these new techniques were able to compensate for a two-clock-cycle skew, even when one transmission channel was removed. The maximum latency for skew compensation was only five clock cycles.},
keywords={},
doi={},
ISSN={},
month={August},}

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TY - JOUR
TI - Skew-Compensation Technique for Parallel Optical Interconnections
T2 - IEICE TRANSACTIONS on Electronics
SP - 1428
EP - 1434
AU - Takeshi SAKAMOTO
AU - Nobuyuki TANAKA
AU - Yasuhiro ANDO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1999
AB - We have developed a low-latency, error-correcting-code-(ECC-)adaptable skew-compensation technique, which is needed for high-speed and long-distance parallel optical interconnections. A new frame-coding technique called shuffled mB1C encoding, which requires no clock-rate conversion circuit and no data buffering, and a new skew-measurement method which is suitable for ECC adaptation have been developed for the compensation. Full-digital skew-compensation circuits using these new techniques were able to compensate for a two-clock-cycle skew, even when one transmission channel was removed. The maximum latency for skew compensation was only five clock cycles.
ER -