Novel Built-In Current Sensor for On-Line Current Testing

Chul Ho KWAK; Jeong Beom KIM

Novel Built-In Current Sensor for On-Line Current Testing

Chul Ho KWAK, Jeong Beom KIM

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This paper proposes a novel CMOS built-in current sensor (BICS) for on-line current testing. Proposed BICS detects abnormal current in circuit under test (CUT) and makes a Pass/Fail signal through comparison between the CUT current and the duplicated inverter current. This circuit consists of two current-to-voltage conversion transistors, a full swing generator, a voltage comparator, and an inverter block. It requires 16 transistors. Since this BICS does not require the extra clock, the added extra pin is only one output pin. Furthermore, the BICS does not require test mode selection. Therefore the BICS can be applied to on-line current testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When the CUT is an 8 8 parallel multiplier, the area overhead of the BICS is about 4.34%.

Publication: IEICE TRANSACTIONS on Electronics Vol.E86-C No.9 pp.1898-1902

Publication Date: 2003/09/01

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Type of Manuscript: LETTER

Category: Integrated Electronics

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Chul Ho KWAK, Jeong Beom KIM, "Novel Built-In Current Sensor for On-Line Current Testing" in IEICE TRANSACTIONS on Electronics, vol. E86-C, no. 9, pp. 1898-1902, September 2003, doi: .
Abstract: This paper proposes a novel CMOS built-in current sensor (BICS) for on-line current testing. Proposed BICS detects abnormal current in circuit under test (CUT) and makes a Pass/Fail signal through comparison between the CUT current and the duplicated inverter current. This circuit consists of two current-to-voltage conversion transistors, a full swing generator, a voltage comparator, and an inverter block. It requires 16 transistors. Since this BICS does not require the extra clock, the added extra pin is only one output pin. Furthermore, the BICS does not require test mode selection. Therefore the BICS can be applied to on-line current testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When the CUT is an 8 8 parallel multiplier, the area overhead of the BICS is about 4.34%.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e86-c_9_1898/_p

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@ARTICLE{e86-c_9_1898,
author={Chul Ho KWAK, Jeong Beom KIM, },
journal={IEICE TRANSACTIONS on Electronics},
title={Novel Built-In Current Sensor for On-Line Current Testing},
year={2003},
volume={E86-C},
number={9},
pages={1898-1902},
abstract={This paper proposes a novel CMOS built-in current sensor (BICS) for on-line current testing. Proposed BICS detects abnormal current in circuit under test (CUT) and makes a Pass/Fail signal through comparison between the CUT current and the duplicated inverter current. This circuit consists of two current-to-voltage conversion transistors, a full swing generator, a voltage comparator, and an inverter block. It requires 16 transistors. Since this BICS does not require the extra clock, the added extra pin is only one output pin. Furthermore, the BICS does not require test mode selection. Therefore the BICS can be applied to on-line current testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When the CUT is an 8 8 parallel multiplier, the area overhead of the BICS is about 4.34%.},
keywords={},
doi={},
ISSN={},
month={September},}

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TY - JOUR
TI - Novel Built-In Current Sensor for On-Line Current Testing
T2 - IEICE TRANSACTIONS on Electronics
SP - 1898
EP - 1902
AU - Chul Ho KWAK
AU - Jeong Beom KIM
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E86-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 2003
AB - This paper proposes a novel CMOS built-in current sensor (BICS) for on-line current testing. Proposed BICS detects abnormal current in circuit under test (CUT) and makes a Pass/Fail signal through comparison between the CUT current and the duplicated inverter current. This circuit consists of two current-to-voltage conversion transistors, a full swing generator, a voltage comparator, and an inverter block. It requires 16 transistors. Since this BICS does not require the extra clock, the added extra pin is only one output pin. Furthermore, the BICS does not require test mode selection. Therefore the BICS can be applied to on-line current testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When the CUT is an 8 8 parallel multiplier, the area overhead of the BICS is about 4.34%.
ER -