Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency

Hongmei CHEN; Jian WANG; Lanyu WANG; Long LI; Honghui DENG; Xu MENG; Yongsheng YIN

doi:10.1587/transele.2022ECP5023

IEICE TRANSACTIONS on Electronics

Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency

Hongmei CHEN, Jian WANG, Lanyu WANG, Long LI, Honghui DENG, Xu MENG, Yongsheng YIN

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This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.

Publication: IEICE TRANSACTIONS on Electronics Vol.E106-C No.3 pp.84-92

Publication Date: 2023/03/01

Publicized: 2022/10/13

Online ISSN: 1745-1353

DOI: 10.1587/transele.2022ECP5023

Type of Manuscript: PAPER

Category: Electronic Circuits

Authors

Hongmei CHEN
  Hefei University of Technology
Jian WANG
  Hefei University of Technology
Lanyu WANG
  Hefei University of Technology
Long LI
  Hefei University of Technology
Honghui DENG
  Hefei University of Technology
Xu MENG
  Hefei University of Technology
Yongsheng YIN
  Hefei University of Technology

Keyword

time-interleaved ADC (TIADC), modulation, channel mismatch, fully digital calibration

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Hongmei CHEN, Jian WANG, Lanyu WANG, Long LI, Honghui DENG, Xu MENG, Yongsheng YIN, "Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency" in IEICE TRANSACTIONS on Electronics, vol. E106-C, no. 3, pp. 84-92, March 2023, doi: 10.1587/transele.2022ECP5023.
Abstract: This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2022ECP5023/_p

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@ARTICLE{e106-c_3_84,
author={Hongmei CHEN, Jian WANG, Lanyu WANG, Long LI, Honghui DENG, Xu MENG, Yongsheng YIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency},
year={2023},
volume={E106-C},
number={3},
pages={84-92},
abstract={This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.},
keywords={},
doi={10.1587/transele.2022ECP5023},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency
T2 - IEICE TRANSACTIONS on Electronics
SP - 84
EP - 92
AU - Hongmei CHEN
AU - Jian WANG
AU - Lanyu WANG
AU - Long LI
AU - Honghui DENG
AU - Xu MENG
AU - Yongsheng YIN
PY - 2023
DO - 10.1587/transele.2022ECP5023
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E106-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2023
AB - This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.
ER -

IEICE TRANSACTIONS on Electronics