PdYb-Silicide with Low Schottky Barrier Height to n-Si Formed from Pd/Yb/Si(100) Stacked Structures

Shun-ichiro OHMI; Mengyi CHEN; Weiguang ZUO; Yasushi MASAHIRO

doi:10.1587/transele.E100.C.458

PdYb-Silicide with Low Schottky Barrier Height to n-Si Formed from Pd/Yb/Si(100) Stacked Structures

Shun-ichiro OHMI, Mengyi CHEN, Weiguang ZUO, Yasushi MASAHIRO

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In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N₂ followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd₂Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.

Publication: IEICE TRANSACTIONS on Electronics Vol.E100-C No.5 pp.458-462

Publication Date: 2017/05/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E100.C.458

Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)

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Authors

Shun-ichiro OHMI
  Tokyo Institute of Technology
Mengyi CHEN
  Tokyo Institute of Technology
Weiguang ZUO
  Tokyo Institute of Technology
Yasushi MASAHIRO
  TANAKA Kikinzoku Kogyo Co., Ltd.

Keyword

PdYb-silicide, contact resistivity, Schottky barrier height, stacked layer, RF magnetron sputtering

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Shun-ichiro OHMI, Mengyi CHEN, Weiguang ZUO, Yasushi MASAHIRO, "PdYb-Silicide with Low Schottky Barrier Height to n-Si Formed from Pd/Yb/Si(100) Stacked Structures" in IEICE TRANSACTIONS on Electronics, vol. E100-C, no. 5, pp. 458-462, May 2017, doi: 10.1587/transele.E100.C.458.
Abstract: In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N₂ followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd₂Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E100.C.458/_p

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@ARTICLE{e100-c_5_458,
author={Shun-ichiro OHMI, Mengyi CHEN, Weiguang ZUO, Yasushi MASAHIRO, },
journal={IEICE TRANSACTIONS on Electronics},
title={PdYb-Silicide with Low Schottky Barrier Height to n-Si Formed from Pd/Yb/Si(100) Stacked Structures},
year={2017},
volume={E100-C},
number={5},
pages={458-462},
abstract={In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N₂ followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd₂Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.},
keywords={},
doi={10.1587/transele.E100.C.458},
ISSN={1745-1353},
month={May},}

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TY - JOUR
TI - PdYb-Silicide with Low Schottky Barrier Height to n-Si Formed from Pd/Yb/Si(100) Stacked Structures
T2 - IEICE TRANSACTIONS on Electronics
SP - 458
EP - 462
AU - Shun-ichiro OHMI
AU - Mengyi CHEN
AU - Weiguang ZUO
AU - Yasushi MASAHIRO
PY - 2017
DO - 10.1587/transele.E100.C.458
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E100-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2017
AB - In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N₂ followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd₂Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.
ER -