A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application

YoungGun PU; Kang-Yoon LEE

doi:10.1587/transele.E92.C.127

A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application

YoungGun PU, Kang-Yoon LEE

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This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/ input referred noise, and 5-dBm IIP₃ at 60-mW power consumption. The power detector shows the 35 dB dynamic range for 100 MHz input.

Publication: IEICE TRANSACTIONS on Electronics Vol.E92-C No.1 pp.127-134

Publication Date: 2009/01/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E92.C.127

Type of Manuscript: PAPER

Category: Electronic Circuits

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YoungGun PU, Kang-Yoon LEE, "A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application" in IEICE TRANSACTIONS on Electronics, vol. E92-C, no. 1, pp. 127-134, January 2009, doi: 10.1587/transele.E92.C.127.
Abstract: This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/ input referred noise, and 5-dBm IIP₃ at 60-mW power consumption. The power detector shows the 35 dB dynamic range for 100 MHz input.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.127/_p

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@ARTICLE{e92-c_1_127,
author={YoungGun PU, Kang-Yoon LEE, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application},
year={2009},
volume={E92-C},
number={1},
pages={127-134},
abstract={This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/ input referred noise, and 5-dBm IIP₃ at 60-mW power consumption. The power detector shows the 35 dB dynamic range for 100 MHz input.},
keywords={},
doi={10.1587/transele.E92.C.127},
ISSN={1745-1353},
month={January},}

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TY - JOUR
TI - A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application
T2 - IEICE TRANSACTIONS on Electronics
SP - 127
EP - 134
AU - YoungGun PU
AU - Kang-Yoon LEE
PY - 2009
DO - 10.1587/transele.E92.C.127
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2009
AB - This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/ input referred noise, and 5-dBm IIP₃ at 60-mW power consumption. The power detector shows the 35 dB dynamic range for 100 MHz input.
ER -