IEICE TRANSACTIONS on Electronics
Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation
Summary :
A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E92-C No.5 pp.647-652
- Publication Date
- 2009/05/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E92.C.647
- Type of Manuscript
- Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
- Category
Authors
Sang Hyuk PARK
Sangwoo KANG
Seongjae CHO
Dong-Seup LEE
Jung Han LEE
Hong-Seon YANG
Kwon-Chil KANG
Joung-Eob LEE
Jong Duk LEE
Byung-Gook PARK
Keyword
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Sang Hyuk PARK, Sangwoo KANG, Seongjae CHO, Dong-Seup LEE, Jung Han LEE, Hong-Seon YANG, Kwon-Chil KANG, Joung-Eob LEE, Jong Duk LEE, Byung-Gook PARK, "Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 5, pp. 647-652, May 2009, doi: 10.1587/transele.E92.C.647.
Abstract: A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.647/_p
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@ARTICLE{e92-c_5_647,
author={Sang Hyuk PARK, Sangwoo KANG, Seongjae CHO, Dong-Seup LEE, Jung Han LEE, Hong-Seon YANG, Kwon-Chil KANG, Joung-Eob LEE, Jong Duk LEE, Byung-Gook PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation},
year={2009},
volume={E92-C},
number={5},
pages={647-652},
abstract={A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.},
keywords={},
doi={10.1587/transele.E92.C.647},
ISSN={1745-1353},
month={May},}
Copy
TY - JOUR
TI - Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation
T2 - IEICE TRANSACTIONS on Electronics
SP - 647
EP - 652
AU - Sang Hyuk PARK
AU - Sangwoo KANG
AU - Seongjae CHO
AU - Dong-Seup LEE
AU - Jung Han LEE
AU - Hong-Seon YANG
AU - Kwon-Chil KANG
AU - Joung-Eob LEE
AU - Jong Duk LEE
AU - Byung-Gook PARK
PY - 2009
DO - 10.1587/transele.E92.C.647
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2009
AB - A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.
ER -
English
