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Novel Three Dimensional (3D) NAND Flash Memory Array Having Tied Bit-line and Ground Select Transistor (TiGer)

Se Hwan PARK, Yoon KIM, Wandong KIM, Joo Yun SEO, Hyungjin KIM, Byung-Gook PARK

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Summary :

We propose a new three-dimensional (3D) NAND flash memory array having Tied Bit-line and Ground Select Transistor (TiGer) [1]. Channels are stacked in the vertical direction to increase the memory density without the device size scaling. To distinguish stacked channels, a novel operation scheme is introduced instead of adding supplementary control gates. The stacked layers are selected by using ground select line (GSL) and common source line (CSL). Device structure and fabrication process are described. Operation scheme and simulation results for program inhibition are also discussed.

Publication
IEICE TRANSACTIONS on Electronics Vol.E95-C No.5 pp.837-841
Publication Date
2012/05/01
Publicized
Online ISSN
1745-1353
DOI
10.1587/transele.E95.C.837
Type of Manuscript
Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
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