IEICE TRANSACTIONS on Electronics
Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices
Summary :
With the technology scaling down, leakage power becomes an important part of total power consumption. The relatively large leakage current weakens the energy recovery capability of adiabatic circuits and reduces its superiority, compared with static CMOS circuits in the field of low-power design. In this paper, we rebuild three types of adiabatic circuits (2N2N2P, IPAL and DCPAL) based on FinFET devices to obtain a large leakage power reduction by rationally utilizing the different operating modes of FinFET devices (SG, LP, and IG). A 16-bit adiabatic adder has been investigated to demonstrate the advantages of FinFET adiabatic circuits. The Predictive Technology Model (PTM) is used for 32-nm bulk MOSFET and FinFET devices and all of the simulations are based on HSPICE. The results evince the proposed FinFET adiabatic circuits have a considerable reduction (more than 60% for SG mode FinFET and more than 80% for LP mode FinFET) of power consumption compared with the bulk MOSFET ones. Furthermore, the FinFET adiabatic circuits also have higher limiting frequency of clock source and better noise immunity.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E96-C No.8 pp.1068-1075
- Publication Date
- 2013/08/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E96.C.1068
- Type of Manuscript
- PAPER
- Category
- Integrated Electronics
Authors
Kai LIAO
Peking University
XiaoXin CUI
Peking University
Nan LIAO
Peking University
KaiSheng MA
Peking University
Keyword
Latest Issue
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Kai LIAO, XiaoXin CUI, Nan LIAO, KaiSheng MA, "Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices" in IEICE TRANSACTIONS on Electronics,
vol. E96-C, no. 8, pp. 1068-1075, August 2013, doi: 10.1587/transele.E96.C.1068.
Abstract: With the technology scaling down, leakage power becomes an important part of total power consumption. The relatively large leakage current weakens the energy recovery capability of adiabatic circuits and reduces its superiority, compared with static CMOS circuits in the field of low-power design. In this paper, we rebuild three types of adiabatic circuits (2N2N2P, IPAL and DCPAL) based on FinFET devices to obtain a large leakage power reduction by rationally utilizing the different operating modes of FinFET devices (SG, LP, and IG). A 16-bit adiabatic adder has been investigated to demonstrate the advantages of FinFET adiabatic circuits. The Predictive Technology Model (PTM) is used for 32-nm bulk MOSFET and FinFET devices and all of the simulations are based on HSPICE. The results evince the proposed FinFET adiabatic circuits have a considerable reduction (more than 60% for SG mode FinFET and more than 80% for LP mode FinFET) of power consumption compared with the bulk MOSFET ones. Furthermore, the FinFET adiabatic circuits also have higher limiting frequency of clock source and better noise immunity.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.1068/_p
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@ARTICLE{e96-c_8_1068,
author={Kai LIAO, XiaoXin CUI, Nan LIAO, KaiSheng MA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices},
year={2013},
volume={E96-C},
number={8},
pages={1068-1075},
abstract={With the technology scaling down, leakage power becomes an important part of total power consumption. The relatively large leakage current weakens the energy recovery capability of adiabatic circuits and reduces its superiority, compared with static CMOS circuits in the field of low-power design. In this paper, we rebuild three types of adiabatic circuits (2N2N2P, IPAL and DCPAL) based on FinFET devices to obtain a large leakage power reduction by rationally utilizing the different operating modes of FinFET devices (SG, LP, and IG). A 16-bit adiabatic adder has been investigated to demonstrate the advantages of FinFET adiabatic circuits. The Predictive Technology Model (PTM) is used for 32-nm bulk MOSFET and FinFET devices and all of the simulations are based on HSPICE. The results evince the proposed FinFET adiabatic circuits have a considerable reduction (more than 60% for SG mode FinFET and more than 80% for LP mode FinFET) of power consumption compared with the bulk MOSFET ones. Furthermore, the FinFET adiabatic circuits also have higher limiting frequency of clock source and better noise immunity.},
keywords={},
doi={10.1587/transele.E96.C.1068},
ISSN={1745-1353},
month={August},}
Copy
TY - JOUR
TI - Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices
T2 - IEICE TRANSACTIONS on Electronics
SP - 1068
EP - 1075
AU - Kai LIAO
AU - XiaoXin CUI
AU - Nan LIAO
AU - KaiSheng MA
PY - 2013
DO - 10.1587/transele.E96.C.1068
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2013
AB - With the technology scaling down, leakage power becomes an important part of total power consumption. The relatively large leakage current weakens the energy recovery capability of adiabatic circuits and reduces its superiority, compared with static CMOS circuits in the field of low-power design. In this paper, we rebuild three types of adiabatic circuits (2N2N2P, IPAL and DCPAL) based on FinFET devices to obtain a large leakage power reduction by rationally utilizing the different operating modes of FinFET devices (SG, LP, and IG). A 16-bit adiabatic adder has been investigated to demonstrate the advantages of FinFET adiabatic circuits. The Predictive Technology Model (PTM) is used for 32-nm bulk MOSFET and FinFET devices and all of the simulations are based on HSPICE. The results evince the proposed FinFET adiabatic circuits have a considerable reduction (more than 60% for SG mode FinFET and more than 80% for LP mode FinFET) of power consumption compared with the bulk MOSFET ones. Furthermore, the FinFET adiabatic circuits also have higher limiting frequency of clock source and better noise immunity.
ER -
English
