IEICE TRANSACTIONS on Electronics
Open Access
A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits
-
Full Text Views
56
- Cite this
- Free PDF (2MB)
Summary :
The single flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feedback loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFQ circuits. The authors introduce detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with those of a graphics-processing unit (GPU). The results show at most 1600 times higher efficiency in terms of Flops/W (floating-point operations per second/Watt) for some high-performance computing application programs.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E97-C No.3 pp.141-148
- Publication Date
- 2014/03/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E97.C.141
- Type of Manuscript
- Special Section INVITED PAPER (Special Section on Leading-Edge Technology of Superconductor Large-Scale Integrated Circuits)
- Category
Authors
Hiroshi KATAOKA
Kyushu University
Hiroaki HONDA
Kyushu University
Farhad MEHDIPOUR
Kyushu University
Nobuyuki YOSHIKAWA
Yokohama National University
Akira FUJIMAKI
Nagoya University
Hiroyuki AKAIKE
Nagoya University
Naofumi TAKAGI
Kyoto University
Kazuaki MURAKAMI
Kyushu University
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Hiroshi KATAOKA, Hiroaki HONDA, Farhad MEHDIPOUR, Nobuyuki YOSHIKAWA, Akira FUJIMAKI, Hiroyuki AKAIKE, Naofumi TAKAGI, Kazuaki MURAKAMI, "A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E97-C, no. 3, pp. 141-148, March 2014, doi: 10.1587/transele.E97.C.141.
Abstract: The single flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feedback loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFQ circuits. The authors introduce detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with those of a graphics-processing unit (GPU). The results show at most 1600 times higher efficiency in terms of Flops/W (floating-point operations per second/Watt) for some high-performance computing application programs.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E97.C.141/_p
Copy
@ARTICLE{e97-c_3_141,
author={Hiroshi KATAOKA, Hiroaki HONDA, Farhad MEHDIPOUR, Nobuyuki YOSHIKAWA, Akira FUJIMAKI, Hiroyuki AKAIKE, Naofumi TAKAGI, Kazuaki MURAKAMI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits},
year={2014},
volume={E97-C},
number={3},
pages={141-148},
abstract={The single flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feedback loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFQ circuits. The authors introduce detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with those of a graphics-processing unit (GPU). The results show at most 1600 times higher efficiency in terms of Flops/W (floating-point operations per second/Watt) for some high-performance computing application programs.},
keywords={},
doi={10.1587/transele.E97.C.141},
ISSN={1745-1353},
month={March},}
Copy
TY - JOUR
TI - A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 141
EP - 148
AU - Hiroshi KATAOKA
AU - Hiroaki HONDA
AU - Farhad MEHDIPOUR
AU - Nobuyuki YOSHIKAWA
AU - Akira FUJIMAKI
AU - Hiroyuki AKAIKE
AU - Naofumi TAKAGI
AU - Kazuaki MURAKAMI
PY - 2014
DO - 10.1587/transele.E97.C.141
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E97-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2014
AB - The single flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feedback loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFQ circuits. The authors introduce detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with those of a graphics-processing unit (GPU). The results show at most 1600 times higher efficiency in terms of Flops/W (floating-point operations per second/Watt) for some high-performance computing application programs.
ER -
English
