IEICE TRANSACTIONS on Electronics
A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology
Summary :
In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E98-C No.12 pp.1171-1178
- Publication Date
- 2015/12/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E98.C.1171
- Type of Manuscript
- PAPER
- Category
- Electronic Circuits
Authors
Aibin YAN
Hefei University of Technology
Huaguo LIANG
Hefei University of Technology
Zhengfeng HUANG
Hefei University of Technology
Cuiyun JIANG
Hefei University of Technology
Maoxiang YI
Hefei University of Technology
Keyword
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Aibin YAN, Huaguo LIANG, Zhengfeng HUANG, Cuiyun JIANG, Maoxiang YI, "A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology" in IEICE TRANSACTIONS on Electronics,
vol. E98-C, no. 12, pp. 1171-1178, December 2015, doi: 10.1587/transele.E98.C.1171.
Abstract: In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.1171/_p
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@ARTICLE{e98-c_12_1171,
author={Aibin YAN, Huaguo LIANG, Zhengfeng HUANG, Cuiyun JIANG, Maoxiang YI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology},
year={2015},
volume={E98-C},
number={12},
pages={1171-1178},
abstract={In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.},
keywords={},
doi={10.1587/transele.E98.C.1171},
ISSN={1745-1353},
month={December},}
Copy
TY - JOUR
TI - A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology
T2 - IEICE TRANSACTIONS on Electronics
SP - 1171
EP - 1178
AU - Aibin YAN
AU - Huaguo LIANG
AU - Zhengfeng HUANG
AU - Cuiyun JIANG
AU - Maoxiang YI
PY - 2015
DO - 10.1587/transele.E98.C.1171
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2015
AB - In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.
ER -
English
