A 32bit CPU, which can operate more than 15 years with 220mAH Li battery, or eternally operate with an energy harvester of in-door light is presented. The CPU was fabricated by using 65nm SOTB CMOS technology (Silicon on Thin Buried oxide) where gate length is 60nm and BOX layer thickness is 10nm. The threshold voltage was designed to be as low as 0.19V so that the CPU operates at over threshold region, even at lower supply voltages down to 0.22V. Large reverse body bias up to -2.5V can be applied to bodies of SOTB devices without increasing gate induced drain leak current to reduce the sleep current of the CPU. It operated at 14MHz and 0.35V with the lowest energy of 13.4 pJ/cycle. The sleep current of 0.14µA at 0.35V with the body bias voltage of -2.5V was obtained. These characteristics are suitable for such new applications as energy harvesting sensor network systems, and long lasting wearable computers.
Koichiro ISHIBASHI
The Univ. of Electro-Communications
Nobuyuki SUGII
Low-power Electronics Association & Project (LEAP)
Shiro KAMOHARA
Low-power Electronics Association & Project (LEAP)
Kimiyoshi USAMI
Shibaura Inst. of Tech.
Hideharu AMANO
Keio Univ.
Kazutoshi KOBAYASHI
Kyoto Inst. of Tech.
Cong-Kha PHAM
The Univ. of Electro-Communications
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Koichiro ISHIBASHI, Nobuyuki SUGII, Shiro KAMOHARA, Kimiyoshi USAMI, Hideharu AMANO, Kazutoshi KOBAYASHI, Cong-Kha PHAM, "A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode" in IEICE TRANSACTIONS on Electronics,
vol. E98-C, no. 7, pp. 536-543, July 2015, doi: 10.1587/transele.E98.C.536.
Abstract: A 32bit CPU, which can operate more than 15 years with 220mAH Li battery, or eternally operate with an energy harvester of in-door light is presented. The CPU was fabricated by using 65nm SOTB CMOS technology (Silicon on Thin Buried oxide) where gate length is 60nm and BOX layer thickness is 10nm. The threshold voltage was designed to be as low as 0.19V so that the CPU operates at over threshold region, even at lower supply voltages down to 0.22V. Large reverse body bias up to -2.5V can be applied to bodies of SOTB devices without increasing gate induced drain leak current to reduce the sleep current of the CPU. It operated at 14MHz and 0.35V with the lowest energy of 13.4 pJ/cycle. The sleep current of 0.14µA at 0.35V with the body bias voltage of -2.5V was obtained. These characteristics are suitable for such new applications as energy harvesting sensor network systems, and long lasting wearable computers.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.536/_p
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@ARTICLE{e98-c_7_536,
author={Koichiro ISHIBASHI, Nobuyuki SUGII, Shiro KAMOHARA, Kimiyoshi USAMI, Hideharu AMANO, Kazutoshi KOBAYASHI, Cong-Kha PHAM, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode},
year={2015},
volume={E98-C},
number={7},
pages={536-543},
abstract={A 32bit CPU, which can operate more than 15 years with 220mAH Li battery, or eternally operate with an energy harvester of in-door light is presented. The CPU was fabricated by using 65nm SOTB CMOS technology (Silicon on Thin Buried oxide) where gate length is 60nm and BOX layer thickness is 10nm. The threshold voltage was designed to be as low as 0.19V so that the CPU operates at over threshold region, even at lower supply voltages down to 0.22V. Large reverse body bias up to -2.5V can be applied to bodies of SOTB devices without increasing gate induced drain leak current to reduce the sleep current of the CPU. It operated at 14MHz and 0.35V with the lowest energy of 13.4 pJ/cycle. The sleep current of 0.14µA at 0.35V with the body bias voltage of -2.5V was obtained. These characteristics are suitable for such new applications as energy harvesting sensor network systems, and long lasting wearable computers.},
keywords={},
doi={10.1587/transele.E98.C.536},
ISSN={1745-1353},
month={July},}
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TY - JOUR
TI - A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode
T2 - IEICE TRANSACTIONS on Electronics
SP - 536
EP - 543
AU - Koichiro ISHIBASHI
AU - Nobuyuki SUGII
AU - Shiro KAMOHARA
AU - Kimiyoshi USAMI
AU - Hideharu AMANO
AU - Kazutoshi KOBAYASHI
AU - Cong-Kha PHAM
PY - 2015
DO - 10.1587/transele.E98.C.536
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2015
AB - A 32bit CPU, which can operate more than 15 years with 220mAH Li battery, or eternally operate with an energy harvester of in-door light is presented. The CPU was fabricated by using 65nm SOTB CMOS technology (Silicon on Thin Buried oxide) where gate length is 60nm and BOX layer thickness is 10nm. The threshold voltage was designed to be as low as 0.19V so that the CPU operates at over threshold region, even at lower supply voltages down to 0.22V. Large reverse body bias up to -2.5V can be applied to bodies of SOTB devices without increasing gate induced drain leak current to reduce the sleep current of the CPU. It operated at 14MHz and 0.35V with the lowest energy of 13.4 pJ/cycle. The sleep current of 0.14µA at 0.35V with the body bias voltage of -2.5V was obtained. These characteristics are suitable for such new applications as energy harvesting sensor network systems, and long lasting wearable computers.
ER -