A Low-Noise Dynamic Comparator for Low-Power ADCs
Summary :
We propose a low-noise and low-power dynamic comparator with an offset calibration circuit for Low-Power ADCs. The proposed comparator equips the control circuit in order to switching the comparison accuracy and the current consumption. When high accuracy is not required, current consumption is reduced by allowing the noise increase. Compared with a traditional dynamic comparator, the proposed architecture reduced the current consumption to 78% at 100MHz operating and 1.8V supply voltage. Furthermore, the offset voltage is corrected with minimal current consumption by controlling the on/off operation of the offset calibration circuit.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E99-C No.5 pp.574-580
- Publication Date
- 2016/05/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E99.C.574
- Type of Manuscript
- PAPER
- Category
- Electronic Circuits
Authors
Yoshihiro MASUI
Hiroshima Institute of Technology
Kotaro WADA
Hiroshima Institute of Technology
Akihiro TOYA
Kure College
Masaki TANIOKA
Hiroshima Institute of Technology
Keyword
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Yoshihiro MASUI, Kotaro WADA, Akihiro TOYA, Masaki TANIOKA, "A Low-Noise Dynamic Comparator for Low-Power ADCs" in IEICE TRANSACTIONS on Electronics,
vol. E99-C, no. 5, pp. 574-580, May 2016, doi: 10.1587/transele.E99.C.574.
Abstract: We propose a low-noise and low-power dynamic comparator with an offset calibration circuit for Low-Power ADCs. The proposed comparator equips the control circuit in order to switching the comparison accuracy and the current consumption. When high accuracy is not required, current consumption is reduced by allowing the noise increase. Compared with a traditional dynamic comparator, the proposed architecture reduced the current consumption to 78% at 100MHz operating and 1.8V supply voltage. Furthermore, the offset voltage is corrected with minimal current consumption by controlling the on/off operation of the offset calibration circuit.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E99.C.574/_p
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@ARTICLE{e99-c_5_574,
author={Yoshihiro MASUI, Kotaro WADA, Akihiro TOYA, Masaki TANIOKA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Low-Noise Dynamic Comparator for Low-Power ADCs},
year={2016},
volume={E99-C},
number={5},
pages={574-580},
abstract={We propose a low-noise and low-power dynamic comparator with an offset calibration circuit for Low-Power ADCs. The proposed comparator equips the control circuit in order to switching the comparison accuracy and the current consumption. When high accuracy is not required, current consumption is reduced by allowing the noise increase. Compared with a traditional dynamic comparator, the proposed architecture reduced the current consumption to 78% at 100MHz operating and 1.8V supply voltage. Furthermore, the offset voltage is corrected with minimal current consumption by controlling the on/off operation of the offset calibration circuit.},
keywords={},
doi={10.1587/transele.E99.C.574},
ISSN={1745-1353},
month={May},}
Copy
TY - JOUR
TI - A Low-Noise Dynamic Comparator for Low-Power ADCs
T2 - IEICE TRANSACTIONS on Electronics
SP - 574
EP - 580
AU - Yoshihiro MASUI
AU - Kotaro WADA
AU - Akihiro TOYA
AU - Masaki TANIOKA
PY - 2016
DO - 10.1587/transele.E99.C.574
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E99-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2016
AB - We propose a low-noise and low-power dynamic comparator with an offset calibration circuit for Low-Power ADCs. The proposed comparator equips the control circuit in order to switching the comparison accuracy and the current consumption. When high accuracy is not required, current consumption is reduced by allowing the noise increase. Compared with a traditional dynamic comparator, the proposed architecture reduced the current consumption to 78% at 100MHz operating and 1.8V supply voltage. Furthermore, the offset voltage is corrected with minimal current consumption by controlling the on/off operation of the offset calibration circuit.
ER -
English
