IEICE TRANSACTIONS on Fundamentals
Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills
Summary :
Floating dummy metal fills inserted for planarization of multi-dielectric layers have created serious problems because of increased interconnect capacitance and the enormous number of fills. We present new dummy filling methods to reduce the interconnect capacitance and the number of dummy metal fills needed. These techniques include three ways of filling: 1) improved floating square fills, 2) floating parallel lines, and 3) floating perpendicular lines (with spacing between dummy metal fills above and below signal lines). We also present efficient formulas for estimating the appropriate spacing and number of fills. In our experiments, the capacitance increase using the conventional regular square method was 13.1%, while that using the methods of improved square fills, extended parallel lines, and perpendicular lines were 2.7%, 2.4%, and 1.0%, respectively. Moreover, the number of necessary dummy metal fills can be reduced by two orders of magnitude through use of the parallel line method.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.12 pp.3471-3478
- Publication Date
- 2005/12/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietfec/e88-a.12.3471
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Interconnect
Authors
Atsushi KUROKAWA
Toshiki KANAMOTO
Tetsuya IBE
Akira KASEBE
Wei Fong CHANG
Tetsuro KAGE
Yasuaki INOUE
Hiroo MASUDA
Keyword
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Atsushi KUROKAWA, Toshiki KANAMOTO, Tetsuya IBE, Akira KASEBE, Wei Fong CHANG , Tetsuro KAGE, Yasuaki INOUE, Hiroo MASUDA, "Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills" in IEICE TRANSACTIONS on Fundamentals,
vol. E88-A, no. 12, pp. 3471-3478, December 2005, doi: 10.1093/ietfec/e88-a.12.3471.
Abstract: Floating dummy metal fills inserted for planarization of multi-dielectric layers have created serious problems because of increased interconnect capacitance and the enormous number of fills. We present new dummy filling methods to reduce the interconnect capacitance and the number of dummy metal fills needed. These techniques include three ways of filling: 1) improved floating square fills, 2) floating parallel lines, and 3) floating perpendicular lines (with spacing between dummy metal fills above and below signal lines). We also present efficient formulas for estimating the appropriate spacing and number of fills. In our experiments, the capacitance increase using the conventional regular square method was 13.1%, while that using the methods of improved square fills, extended parallel lines, and perpendicular lines were 2.7%, 2.4%, and 1.0%, respectively. Moreover, the number of necessary dummy metal fills can be reduced by two orders of magnitude through use of the parallel line method.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.12.3471/_p
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@ARTICLE{e88-a_12_3471,
author={Atsushi KUROKAWA, Toshiki KANAMOTO, Tetsuya IBE, Akira KASEBE, Wei Fong CHANG , Tetsuro KAGE, Yasuaki INOUE, Hiroo MASUDA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills},
year={2005},
volume={E88-A},
number={12},
pages={3471-3478},
abstract={Floating dummy metal fills inserted for planarization of multi-dielectric layers have created serious problems because of increased interconnect capacitance and the enormous number of fills. We present new dummy filling methods to reduce the interconnect capacitance and the number of dummy metal fills needed. These techniques include three ways of filling: 1) improved floating square fills, 2) floating parallel lines, and 3) floating perpendicular lines (with spacing between dummy metal fills above and below signal lines). We also present efficient formulas for estimating the appropriate spacing and number of fills. In our experiments, the capacitance increase using the conventional regular square method was 13.1%, while that using the methods of improved square fills, extended parallel lines, and perpendicular lines were 2.7%, 2.4%, and 1.0%, respectively. Moreover, the number of necessary dummy metal fills can be reduced by two orders of magnitude through use of the parallel line method.},
keywords={},
doi={10.1093/ietfec/e88-a.12.3471},
ISSN={},
month={December},}
Copy
TY - JOUR
TI - Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3471
EP - 3478
AU - Atsushi KUROKAWA
AU - Toshiki KANAMOTO
AU - Tetsuya IBE
AU - Akira KASEBE
AU - Wei Fong CHANG
AU - Tetsuro KAGE
AU - Yasuaki INOUE
AU - Hiroo MASUDA
PY - 2005
DO - 10.1093/ietfec/e88-a.12.3471
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2005
AB - Floating dummy metal fills inserted for planarization of multi-dielectric layers have created serious problems because of increased interconnect capacitance and the enormous number of fills. We present new dummy filling methods to reduce the interconnect capacitance and the number of dummy metal fills needed. These techniques include three ways of filling: 1) improved floating square fills, 2) floating parallel lines, and 3) floating perpendicular lines (with spacing between dummy metal fills above and below signal lines). We also present efficient formulas for estimating the appropriate spacing and number of fills. In our experiments, the capacitance increase using the conventional regular square method was 13.1%, while that using the methods of improved square fills, extended parallel lines, and perpendicular lines were 2.7%, 2.4%, and 1.0%, respectively. Moreover, the number of necessary dummy metal fills can be reduced by two orders of magnitude through use of the parallel line method.
ER -
English
