Floating dummy metal fills inserted for planarization of multi-dielectric layers have created serious problems because of increased interconnect capacitance and the enormous number of fills. We present new dummy filling methods to reduce the interconnect capacitance and the number of dummy metal fills needed. These techniques include three ways of filling: 1) improved floating square fills, 2) floating parallel lines, and 3) floating perpendicular lines (with spacing between dummy metal fills above and below signal lines). We also present efficient formulas for estimating the appropriate spacing and number of fills. In our experiments, the capacitance increase using the conventional regular square method was 13.1%, while that using the methods of improved square fills, extended parallel lines, and perpendicular lines were 2.7%, 2.4%, and 1.0%, respectively. Moreover, the number of necessary dummy metal fills can be reduced by two orders of magnitude through use of the parallel line method.

Developing LSIs with EMI suppression, particularly for use in automobiles, is important for improving warranties and customer acquisition. First, we describe that the measures against EMI noise caused by a X'tal oscillator are important. Next, we present a practical method for analyzing the noise with models of the inside and outside of a chip. In addition, we propose a within-chip measure against EMI noise that takes chip cost into account. The noise is suppressed by using an appropriate resistance and capacitance on the power line. Simulation results demonstrated the method's effectiveness in suppressing noise.