A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture

Shin'ichi KOUYAMA; Tomonori IZUMI; Hiroyuki OCHI; Yukihiro NAKAMURA

doi:10.1093/ietfec/e90-a.4.784

A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture

Shin'ichi KOUYAMA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA

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Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E90-A No.4 pp.784-791

Publication Date: 2007/04/01

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Online ISSN: 1745-1337

DOI: 10.1093/ietfec/e90-a.4.784

Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)

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Shin'ichi KOUYAMA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA, "A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture" in IEICE TRANSACTIONS on Fundamentals, vol. E90-A, no. 4, pp. 784-791, April 2007, doi: 10.1093/ietfec/e90-a.4.784.
Abstract: Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e90-a.4.784/_p

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@ARTICLE{e90-a_4_784,
author={Shin'ichi KOUYAMA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture},
year={2007},
volume={E90-A},
number={4},
pages={784-791},
abstract={Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.},
keywords={},
doi={10.1093/ietfec/e90-a.4.784},
ISSN={1745-1337},
month={April},}

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TY - JOUR
TI - A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 784
EP - 791
AU - Shin'ichi KOUYAMA
AU - Tomonori IZUMI
AU - Hiroyuki OCHI
AU - Yukihiro NAKAMURA
PY - 2007
DO - 10.1093/ietfec/e90-a.4.784
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E90-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2007
AB - Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.
ER -