Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter
Summary :
A calibrating analog-to digital (A/D) converter employing a T-Model neural network is described. The T-Model neural-based A/D converter architecure is presented with particular emphasis on the elimination of local minimum of the Hopfield neural network. Furthermore, a teacher forcing algorithm is presented and used to synthesize the A/D converter and correct errors of the converter due to offset and device mismatch. An experimental A/D converter using standard 5-µm CMOS discrete IC circuits demonstrates high-performance analog-to-digital conversion and calibrating.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E79-A No.4 pp.553-559
- Publication Date
- 1996/04/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Analog Signal Processing
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Zheng TANG, Yuichi SHIRATA, Okihiko ISHIZUKA, Koichi TANNO, "Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter" in IEICE TRANSACTIONS on Fundamentals,
vol. E79-A, no. 4, pp. 553-559, April 1996, doi: .
Abstract: A calibrating analog-to digital (A/D) converter employing a T-Model neural network is described. The T-Model neural-based A/D converter architecure is presented with particular emphasis on the elimination of local minimum of the Hopfield neural network. Furthermore, a teacher forcing algorithm is presented and used to synthesize the A/D converter and correct errors of the converter due to offset and device mismatch. An experimental A/D converter using standard 5-µm CMOS discrete IC circuits demonstrates high-performance analog-to-digital conversion and calibrating.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e79-a_4_553/_p
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@ARTICLE{e79-a_4_553,
author={Zheng TANG, Yuichi SHIRATA, Okihiko ISHIZUKA, Koichi TANNO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter},
year={1996},
volume={E79-A},
number={4},
pages={553-559},
abstract={A calibrating analog-to digital (A/D) converter employing a T-Model neural network is described. The T-Model neural-based A/D converter architecure is presented with particular emphasis on the elimination of local minimum of the Hopfield neural network. Furthermore, a teacher forcing algorithm is presented and used to synthesize the A/D converter and correct errors of the converter due to offset and device mismatch. An experimental A/D converter using standard 5-µm CMOS discrete IC circuits demonstrates high-performance analog-to-digital conversion and calibrating.},
keywords={},
doi={},
ISSN={},
month={April},}
Copy
TY - JOUR
TI - Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 553
EP - 559
AU - Zheng TANG
AU - Yuichi SHIRATA
AU - Okihiko ISHIZUKA
AU - Koichi TANNO
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E79-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 1996
AB - A calibrating analog-to digital (A/D) converter employing a T-Model neural network is described. The T-Model neural-based A/D converter architecure is presented with particular emphasis on the elimination of local minimum of the Hopfield neural network. Furthermore, a teacher forcing algorithm is presented and used to synthesize the A/D converter and correct errors of the converter due to offset and device mismatch. An experimental A/D converter using standard 5-µm CMOS discrete IC circuits demonstrates high-performance analog-to-digital conversion and calibrating.
ER -
English
